
aPPendix a i/o MaP
s1C33L17 teChniCaL ManuaL
ePson
aP-a-45
AP
I/Omap
0x300B00–0x300B06
serial interface
name
address
Register name
Bit
Function
setting
init. R/W
Remarks
0x0 to 0xFF(0x7F)
txd07
txd06
txd05
txd04
txd03
txd02
txd01
txd00
D7
D6
D5
D4
D3
D2
D1
D0
Serial I/F Ch.0 transmit data
TXD07(06) = MSB
TXD00 = LSB
X
R/W 7-bit asynchronous
mode does not use
TXD07.
00300B00
(B)
serial i/F Ch.0
transmit data
register
(pEFSIF0_TXD)
0x0 to 0xFF(0x7F)
Rxd07
Rxd06
Rxd05
Rxd04
Rxd03
Rxd02
Rxd01
Rxd00
D7
D6
D5
D4
D3
D2
D1
D0
Serial I/F Ch.0 receive data
RXD07(06) = MSB
RXD00 = LSB
X
R
7-bit asynchronous
mode does not use
RXD07 (fixed at 0).
00300B01
(B)
serial i/F Ch.0
receive data
register
(pEFSIF0_RXD)
Rxd0nuM1
Rxd0nuM0
tend0
FeR0
PeR0
oeR0
tdBe0
RdBF0
D7
D6
D5
D4
D3
D2
D1
D0
Number of Ch.0 receive data
in FIFO
Ch.0 transmit-completion flag
Ch.0 framing error flag
Ch.0 parity error flag
Ch.0 overrun error flag
Ch.0 transmit data buffer empty
Ch.0 receive data buffer full
0
1
0
R
R/W
R
Reset by writing 0.
00300B02
(B)
1 Error
0 Normal
1 Transmitting 0 End
1 Error
0 Normal
1 Error
0 Normal
1 Empty
0 Not empty
1 Full
0 Not full
serial i/F Ch.0
status register
(pEFSIF0_STATUS)
RXD0NUM[1:0] Number of data
4
3
2
1 or 0
11
10
01
00
txen0
Rxen0
ePR0
PMd0
stPB0
ssCK0
sMd01
sMd00
D7
D6
D5
D4
D3
D2
D1
D0
Ch.0 transmit enable
Ch.0 receive enable
Ch.0 parity enable
Ch.0 parity mode select
Ch.0 stop bit select
Ch.0 input clock select
Ch.0 transfer mode select
11
10
01
00
SMD0[1:0]
Transfer mode
8-bit asynchronous
7-bit asynchronous
Clock sync. Slave
Clock sync. Master
0
X
R/W
Valid only in
asynchronous mode.
00300B03
(B)
1 Enabled
0 Disabled
1 Enabled
0 Disabled
1 With parity 0 No parity
1 Odd
0 Even
1 2 bits
0 1 bit
1 #SCLK0
0 Internal clock
serial i/F Ch.0
control register
(pEFSIF0_CTL)
sRdYCtL0
FiFoint01
FiFoint00
diVMd0
iRtL0
iRRL0
iRMd01
iRMd00
D7
D6
D5
D4
D3
D2
D1
D0
Ch.0 #SRDY control
Ch.0 receive buffer full interrupt
timing
Ch.0 async. clock division ratio
Ch.0 IrDA I/F output logic inversion
Ch.0 IrDA I/F input logic inversion
Ch.0 interface mode select
0
X
R/W
Writing is disabled
when SIOADV
(D0/0x300B4F) = "0".
Valid only in
asynchronous mode.
00300B04
(B)
1 1/8
0 1/16
1 High mask 0 Normal
1 Inverted
0 Direct
1 Inverted
0 Direct
serial i/F Ch.0
irda register
(pEFSIF0_IRDA)
IRMD0[1:0]
I/F mode
reserved
IrDA 1.0
reserved
General I/F
11
10
01
00
11
10
01
00
FIFOINT0[1:0] Receive level
4
3
2
1
–
–
BRtRun0
D7–1
D0
reserved
Baud-rate timer Run/Stop control
–
0
–
R/W
0 when being read.
00300B05
(B)
1 Run
0 Stop
serial i/F Ch.0
baud-rate timer
control register
(pEFSIF0_BRTRUN)
0x0 to 0xFF
(BRTRD0[11:0] = 0x0 to 0xFFF)
BRtRd07
BRtRd06
BRtRd05
BRtRd04
BRtRd03
BRtRd02
BRtRd01
BRtRd00
D7
D6
D5
D4
D3
D2
D1
D0
Serial I/F Ch.0
baud-rate timer reload data [7:0]
0
R/W
00300B06
(B)
serial i/F Ch.0
baud-rate timer
reload data
register (LsB)
(pEFSIF0_BRTRDL)