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iX-1-33
IX
USB
iX.1.4.4snooze
This macro has Snooze function which enables very low power operation when USB is not active.
When the SNOOZE signal is asserted by writing 1 to USBSNZ (D5/0x300012), the following procedure will be
performed and allows to stop feeding 48 MHz clock after 5 clocks inputs.
Disable USB differential comparator
Allow asynchronous access for VBUS_Changed and NonJ bits of the SIE_IntStat register. (Monitor the USB
interface input pins)
Mask Read/Write for synchronous registers
Mask synchronous interrupt
This macro will resume after 5 clocks (oscillation must be stable) when the SNOOZE signal is negated.
48MHzclock
SNOOZE
5clock
FigureIX.1.4.4.1SnoozeSequence
Snooze mode should be set or canceled by the following procedure:
settingsnoozemode
(1) Write 0x96 to the Misc Protect Register (0x300020) to disable write protection for the Misc registers.
(2) Set USBSNZ (D5/0x300012) in the USB Wait Control Register to 1 to enable the snooze control.
(3) Write a value other than 0x96 to the Misc Protect Register (0x300020) to enable write protection for the
Misc registers.
(4) Write 0x96 to the Clock Control Protect Register (0x301B24) to disable write protection for the CMU
registers.
(5) Set USB_CKE (D8/0x301B00) in the Gated Clock Control Register 0 to 0 to stop supplying the USB clock.
(6) Write a value other than 0x96 to the Clock Control Protect Register (0x301B24) to enable write protection
for the CMU registers.
Cancelingsnoozemode
(1) Write 0x96 to the Clock Control Protect Register (0x301B24) to disable write protection for the CMU
registers.
(2) Set USB_CKE (D8/0x301B00) in the Gated Clock Control Register 0 to 1 to start supplying the USB clock.
(3) Write a value other than 0x96 to the Clock Control Protect Register (0x301B24) to enable write protection
for the CMU registers.
(4) Write 0x96 to the Misc Protect Register (0x300020) to disable write protection for the Misc registers.
(5) Set USBSNZ (D5/0x300012) in the USB Wait Control Register to 0 to disable the snooze control.
(6) Write a value other than 0x96 to the Misc Protect Register (0x300020) to enable write protection for the
Misc registers.