
aPPendix a i/o MaP
aP-a-4
ePson
s1C33L17 teChniCaL ManuaL
0x300269–0x300272
interrupt Controller
name
address
Register name
Bit
Function
setting
init. R/W
Remarks
–
0 to 7
–
–
Psio02
Psio01
Psio00
–
PLCdC2
PLCdC1
PLCdC0
D7
D6
D5
D4
D3
D2
D1
D0
reserved
Serial interface Ch.0
interrupt level
reserved
LCDC interrupt level
–
X
–
X
–
R/W
–
R/W
0 when being read.
00300269
(B)
LCdC, serial i/F
Ch.0 interrupt
priority register
(pINT_PLCDC_
PSI00)
–
0 to 7
–
–
Pad2
Pad1
Pad0
–
Psio12
Psio11
Psio10
D7
D6
D5
D4
D3
D2
D1
D0
reserved
A/D converter interrupt level
reserved
Serial interface Ch.1
interrupt level
–
X
–
X
–
R/W
–
R/W
0 when being read.
0030026a
(B)
serial i/F Ch.1,
a/d interrupt
priority register
(pINT_PSI01_PAD)
–
0 to 7
–
PRtC2
PRtC1
PRtC0
D7–3
D2
D1
D0
reserved
RTC interrupt level
–
X
–
R/W
Writing 1 not allowed.
0030026B
(B)
RtC interrupt
priority register
(pINT_PRTC)
–
0 to 7
–
–
PP5L2
PP5L1
PP5L0
–
PP4L2
PP4L1
PP4L0
D7
D6
D5
D4
D3
D2
D1
D0
reserved
Port input 5 interrupt level
reserved
Port input 4 interrupt level
–
X
–
X
–
R/W
–
R/W
0 when being read.
0030026C
(B)
Port input 4–5
interrupt
priority register
(pINT_PP45L)
–
0 to 7
–
–
PP7L2
PP7L1
PP7L0
–
PP6L2
PP6L1
PP6L0
D7
D6
D5
D4
D3
D2
D1
D0
reserved
Port input 7 interrupt level
reserved
Port input 6 interrupt level
–
X
–
X
–
R/W
–
R/W
0 when being read.
0030026d
(B)
Port input 6–7
interrupt
priority register
(pINT_PP67L)
–
0 to 7
–
–
PsPi2
PsPi1
PsPi0
–
Psio22
Psio21
Psio20
D7
D6
D5
D4
D3
D2
D1
D0
reserved
SPI
interrupt level
reserved
Serial interface Ch.2
interrupt level
–
X
–
X
–
R/W
–
R/W
0 when being read.
0030026e
(B)
serial i/F Ch.2,
sPi interrupt
priority register
(pINT_PSI02_PSPI)
–
eK1
eK0
eP3
eP2
eP1
eP0
D7–6
D5
D4
D3
D2
D1
D0
reserved
Key input 1
Key input 0
Port input 3
Port input 2
Port input 1
Port input 0
–
0
–
R/W
0 when being read.
00300270
(B)
1 Enabled
0 Disabled
Key input,
port input 0–3
interrupt
enable register
(pINT_EK01_EP03)
–
eidMa
ehdM3
ehdM2
ehdM1
ehdM0
D7–5
D4
D3
D2
D1
D0
reserved
IDMA
HSDMA Ch.3
HSDMA Ch.2
HSDMA Ch.1
HSDMA Ch.0
–
0
–
R/W
0 when being read.
00300271
(B)
1 Enabled
0 Disabled
dMa interrupt
enable register
(pINT_EDMA)
e16tC1
e16tu1
–
e16tC0
e16tu0
–
D7
D6
D5–4
D3
D2
D1–0
16-bit timer 1 comparison A
16-bit timer 1 comparison B
reserved
16-bit timer 0 comparison A
16-bit timer 0 comparison B
reserved
0
–
0
–
R/W
–
R/W
–
0 when being read.
00300272
(B)
1 Enabled
0 Disabled
16-bit timer 0–1
interrupt
enable register
(pINT_E16T01)
–
1 Enabled
0 Disabled
–