
iiBusModuLes:sdRaMContRoLLeR(sdRaMC)
ii-4-16
ePson
s1C33L17teChniCaLManuaL
self-refresh
Self-refresh uses the SDRAM’s self-refresh function and does not require clock pulses during the refresh
period, thus helping to reduce the chip’s power consumption. This self-refresh function is also used for data
retention during power-down mode.
To cause the SDRAM to be self-refreshed, set SELEN (D23/0x301608) to 1. This enables the SDRAM
controller to send the self-refresh command (which sets the SDCKE output to low) to the SDRAM.
seLen:SDRAMSelf-RefreshEnableBitintheSDRAMRefreshRegister(D23/0x301608)
The command is actually sent a certain time after accessing or auto-refreshing the SDRAM, so the SDRAM
controller contains a self-refresh counter to count this time. The counter counts on SDCLK clock edges, and
when the designated count is reached, the SDRAM controller sends the self-refresh command to the SDRAM.
When an SDRAM access or auto-refresh command is issued, the counter is reset and starts counting again. The
designated value for the counter can be specified in a range of 1 to 127 by using the SELCO[6:0] (D[22:16]/
0x301608). Do not set the counter to 0 when the self-refresh function is enabled.
seLCo[6:0]:SDRAMSelf-RefreshCounterBitsintheSDRAMRefreshRegister(D[22:16]/0x301608)
When an SDRAM access occurs during self-refresh mode, SDCKE is returned high and the SDRAM is taken
out of self-refresh mode. After the SDRAM access has finished, the SDRAM controller sends another self-
refresh command when the designated count is reached again.
When the auto-refresh command is issued or an SDRAM access occurs, the counter will restart if the self-
refresh command has not been sent to the SDRAM. Therefore, the self-refresh counter value to be set must be
smaller than the auto-refresh counter value.
SDCLK
Command
SDCKE
#SDCS
#SDRAS
#SDCAS
#SDWE
SDBA[1:0]
SDA[10]
SDA[12:11,9:0]
DQMH/DQML
DQ[15:0]
SELDO
SELF
L
PALL NOP
Selfrefreshmode
Entersselfrefreshmode
Exitsselfrefreshmode
tRP
TheSDRAMclockstopswhenSCKON=0.
FigureII.4.1.5.7SelfRefresh
During self-refresh (while SDCKE = low), the SELDO (D25/0x301608) remains 1. Therefore, it is possible to
determine whether or not self-refresh is in operation by reading this status register.
seLdo:SDRAMSelf-RefreshStatusBitintheSDRAMRefreshRegister(D25/0x301608)
Furthermore, SDRAM clock output during self-refresh can be turned off in order to reduce the chip’s power
consumption by setting the SCKON (D24/0x301608) to 0.
sCKon:SDRAMClockEnableDuringSelf-RefreshBitintheSDRAMRefreshRegister(D24/0x301608)