
iXPeRiPheRaLMoDuLes7(usB):usBFunCtionContRoLLeR(usB)
iX-1-28
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iX.1.4.3Portinterface
Functionaldescription
The Port interface is a DMA interface designed for fast data transfer between this macro and the FIFO for its
built-in endpoints. It provides Asynchronous DMA Transfer mode for transfer triggered by the Read/Write-
strobe signal.
Basicoperations
This section describes the basic operations of the Port interface.
Registersetting
Table IX.1.4.3.1 lists the registers used for setting basic items of the Port interface. Set desired values for the
respective registers. To enable the DMA to write, set the DMA_Join register to connect the Port interface to the
endpoint set to the IN direction of the USB. To enable the DMA to read, connect to the endpoint set to the OUT
direction.
Do not modify the basic setting registers while the DMA is transferring data (when DMA_Control.
DMA_Running is set to 1). We do not guarantee normal operations if the basic setting registers are modified
while the DMA in transferring data.
TableIX.1.4.3.1PortInterface'sRegistersforBasicSettingItems
Register/bit
DMA_Join.JoinEPr{r=a,b,c,d}DMA
DMA_Count_r{r=HH,HL,LH,LL}
DMA_Config_0.ActivePort
DMA_Config_0.PDREQ_Level
DMA_Config_0.PDACK_Level
DMA_Config_0.PDRDWR_Level
DMA_Config_1.RcvLimitMode
DMA_Config_1.SingleWord
DMA_Config_1.CountMode
Description
ConnectsthePortinterfacetotheendpointofthebit
setto1.Writing/readingisenabledto/fromthe
connectedendpoint.
Setsthenumberofbytestobedown-countedin
Countdownmode.
EnablestheportforthePortinterface.
SetstheactivelevelofthePortinterfacesignal.
0:High-active.1:Low-active.
OnlyenabledwhilewritinginAsynchronoustransfer
mode.
Ifthisbitissetto1,upto16bytesofdatacanbe
receivedevenafternegatingPDREQ.
SetsthetransfermodeforoperationinAsynchronous
transfermode.
0:Multi-wordtransfer.1:Single-wordtransfer.
SetsCountdown/Free-runmode.
0:Free-runmode.1:Countdownmode.
item
Endpointconnection
Countersetting
Activeport
Activelevel
RcvLimitmode
Single-/multi-word
Countmode
DMatransfer
After setting the basic setting registers, write 1 to the DMA_Control.DMA_Go bit to cause the Port interface
to start running the DMA. After the DMA starts running, the DMA_Control.DMA_Running bit is set to 1,
indicating that the DMA is running.
If the DMA is set to the Countdown mode with DMA_Config_1.CountMode = 1, the DMA completes data
transfer when the DMA_Count_HH, HL, LH and LL registers reach 0000_0000h. To force the DMA to
terminate data transfer, provide 1 to the DMA_Control.DMA_Stop bit. After the DMA completes data transfer,
the DMA_Control.DMA_Running bit attains 0 and the DMA_IntStat.DMA_Cmp bit 1. At this time, if the
DMA_IntEnb.EnDMA_Cmp bit is set, the #INT signal is asserted to the CPU.