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型號(hào)：	S1C33L17B00E100
元件分類：	微控制器/微處理器
英文描述：	MICROCONTROLLER, PBGA180
封裝：	12 X 12 MM, 1.2 MM HEIGHT, 0.80 MM PITCH, PLASTIC, BGA-180
文件頁數(shù)：	226/1026頁
文件大?。?/td>	12570K
代理商：	S1C33L17B00E100

iiiPeriPheraLModuLes1(systeM):CLoCkManageMentunit(CMu)

s1C33L17teChniCaLManuaL

iii.1.4selectingthesystemClocksource

The CMU has the following three clock inputs, one of which can be selected as the source clock (OSC) for the

1.osC3clock

This clock is generated by the OSC3 oscillator circuit or supplied from an external source through the MCLKI

pin. For details about the OSC3 oscillator circuit, see Section III.1.5.1, “OSC3 Oscillator Circuit.”

2.osC1clock

This is the source clock (32.768 kHz, typ.) for the Real Time Clock (RTC). When high-speed operation

is unnecessary, this low-speed clock may be used to operate the system, thus helping to reduce power

consumption on the chip. For details about the OSC1 oscillator circuit, see Section III.1.5.3, “OSC1 Oscillator

3.PLLclock

This is the PLL output clock through the SSCG module. The PLL multiplies the OSC3 divided clock frequency

by a given value to generate a clock for high-speed operation. The frequency multiplication rate can be set to

×1 to ×16, note, however, that it depends on the OSC3 divided clock frequency (maximum output

frequency is 90 MHz).

For details about the PLL, see Section III.1.6, “Controlling the PLL.”

The clock source can be selected as shown in Table III.1.4.1 by using OSCSEL[1:0] (D[3:2]/0x301B08).

osCseL[1:0]:OSCClockSelectBitsintheSystemClockControlRegister(D[3:2]/0x301B08)

TableIII.1.4.1SelectionoftheSystemClockSource

Clocksource

(Default:0b00=OSC3)

The clock source changed here is not reflected until after the CPU returns from SLEEP mode. Therefore, the slp

instruction must be executed once after setting OSCSEL[1:0] (D[3:2]/0x301B08). Although the CPU returns from

SLEEP mode to normal operation by an external interrupt from a port, for example, several functions are provided

for use in clock source changes, thus automatically returning the CPU from SLEEP mode a certain time after slp

instruction execution or leaving the OSC3 oscillator circuit turned on during SLEEP mode. Section III.1.11, “Standby

Modes,” describes these methods of control in detail.

note: When clock sources are changed, the CMU control registers must be set so that the CMU

is supplied with a clock from the selected clock source upon returning from SLEEP mode

immediatelyafterthechange.Otherwise,thechipdoesnotrestartafterthereturnfromSLEEP

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相關(guān)代理商/技術(shù)參數(shù)	參數(shù)描述
S1C33L17D00A000	制造商:Seiko Instruments Inc (SII) 功能描述:IC 32BIT MCU 33L17 DIE FORM
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S1C33L26	制造商:EPSON 制造商全稱:EPSON 功能描述:CMOS 32-bit Application Specific Controller
S1C33L27	制造商:EPSON 制造商全稱:EPSON 功能描述:CMOS 32-bit Application Specific Controller
S1C33S01	制造商:EPSON 制造商全稱:EPSON 功能描述:32-bit Single Chip Microcontroller

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