
iiBusModuLes:inteLLigentdMa(idMa)
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ii-2-3
II
IDMA
ii.2.2ProgrammingControlinformation
The intelligent DMA operates according to the control information prepared in RAM. Note that the control
information must be placed in DST RAM (area 3) or an external RAM. A0RAM (area 0) cannot be used to store
control information.
The control information is 4 words (16 bytes) per channel in size, and must be located at continuous addresses
beginning with the base address that is set in the software application as the starting address of channel 0.
Consequently, an area of 512 words (2,048 bytes) in RAM is required in order for all of 128 channels to be used.
Note that the last 132 bytes in DST RAM (area 3) are reserved for the debug circuits. Therefore, up to 119 channels
are available when using the on-chip debug functions.
The following explains how to set the base address and the contents of control information. Before using IDMA,
make each the settings described below.
ii.2.2.1settingtheBaseaddress
Set the starting address of control information (starting address of channel 0) to DBASEL[15:0] (D[15:0]/0x301100)
for 16 low-order bits and DBASEH[15:0] (D[15:0]/0x301102) for 16 high-order address bits.
dBaseL[15:0]:IDMALow-orderBaseAddressBitsintheIDMABaseAddressRegister0(D[15:0]/0x301100)
dBaseh[15:0]:IDMAHigh-orderBaseAddressBitsintheIDMABaseAddressRegister1(D[15:0]/0x301102)
When initially reset, the base address is set to 0x200003A0.
notes: ThecontrolinformationmustbeplacedinDSTRAM(area3)oranexternalRAM.A0RAM(area
0)cannotbeusedtostorecontrolinformation.
TheaddressyousetintheIDMAbaseaddressregistermustalwaysbe4-wordunitsboundary
address.
Be sure to disable DMA transfers (IDMAEN (D0/0x301105) = 0) before setting the base
address.Writing to the IDMA base address register is ignored when the DMA transfer
is enabled (IDMAEN (D0/0x301105) = 1).When the register is read, the read data is
indeterminate.
idMaen:IDMAEnableBitintheIDMAEnableRegister(D0/0x301105)
ii.2.2.2Controlinformation
Write the control information for the IDMA channels used to RAM.
The addresses at which the control information of each channel is placed are determined by the base address and a
channel number.
Startingaddressofchannel=baseaddress+(channelnumber
×16[bytes])
note: ThecontrolinformationmustbewrittenonlywhenthechanneltobesetdoesnotstartaDMA
transfer.IfaDMAtransferstartswhenthecontrolinformationisbeingwrittentotheRAM,proper
transfercannotbeperformed.Readingthecontrolinformationcanalwaysbedone.