
iiiPeriPheraLModuLes1(systeM):MisCregisters
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ePson
iii-4-7
III
MISC
iii.4.6detailsofControlregisters
TableIII.4.6.1ListofMiscRegisters
address
0x00300010
0x00300012
0x00300014
0x00300016
0x00300018
0x00300020
0x00300C41
0x00300C42
0x00300C43
0x00300C44
0x00300C45
0x00300C46
0x00300C47
0x00300C48
0x00300C49
0x00300C4A
0x00300C4B
0x00300C4C
0x00300C4D
Function
SetstheRTCregisteraccesswaitcycle.
SetstheUSBregisteraccesswaitcycle.
ConfigurestheP15–P17andP34–P36pinsfor
debugging.
Testregister
Indicates/setsbootconditions.
Enables/disableswriteprotectionofMiscregisters.
Drivesthebussignalslow.
ControlstheP0portpull-upresistors.
ControlstheP1portpull-upresistors.
ControlstheP2portpull-upresistors.
ControlstheP3portpull-upresistors.
ControlstheP4portpull-upresistors.
ControlstheP5portpull-upresistors.
ControlstheP6portpull-upresistors.
ControlstheP7portpull-upresistors.
ControlstheP8portpull-upresistors.
ControlstheP9portpull-upresistors.
ControlsthePAportpull-upresistors.
ControlsthePBportpull-upresistors.
registername
RTCWaitControlRegister(pMISC_RTCWT)
USBWaitControlRegister(pMISC_USBWT)
DebugPortMUXRegister(pMISC_PMUX)
PerformanceAnalyzerControlRegister(pMISC_PAC)
BootRegister(pMISC_BOOT)
MiscProtectRegister(pMISC_PROT)
BusSignalLowDriveControlRegister
(pMISC_BUSLOW)
P0Pull-upControlRegister(pMISC_PUP0)
P1Pull-upControlRegister(pMISC_PUP1)
P2Pull-upControlRegister(pMISC_PUP2)
P3Pull-upControlRegister(pMISC_PUP3)
P4Pull-upControlRegister(pMISC_PUP4)
P5Pull-upControlRegister(pMISC_PUP5)
P6Pull-upControlRegister(pMISC_PUP6)
P7Pull-upControlRegister(pMISC_PUP7)
P8Pull-upControlRegister(pMISC_PUP8)
P9Pull-upControlRegister(pMISC_PUP9)
PAPull-upControlRegister(pMISC_PUPA)
size
8
The following describes the Misc registers.
The Misc registers are mapped as 8-bit devices to Area 6 at addresses 0x300010 to 0x300020 and 0x300C41 to
0x300C4D, and can be accessed in units of bytes.
note: TheMiscregistersataddresses0x300010–0x30001Aarewrite-protected.BeforetheMiscreg-
isterscanberewritten,writeprotectionoftheseregistersmustberemovedbywritingdata0x96
to the Misc Protect Register (0x300020). Note that since unnecessary rewrites to addresses
0x300010–0x30001Acouldleadtoerraticsystemoperation,theMiscProtectRegister(0x300020)
shouldbesettootherthan0x96unlesssaidMiscregistersmustberewritten.
Theregisterslocatedfrom0x300C41to0x300C4Darenotprotected.