
MOTOROLA
Index
Index-1
Index
A
AACK signal, 8-26
ABB signal, 8-12, 9-7
ABE (address broadcast enable) bit, 4-23
Active-low signals, 8-1
Address breakpoint register, 2-10
Address broadcast enable, 2-13
Address bus
address transfer attribute
A
n
, 8-15
APE, 8-18, 9-12
AP
n
, 8-17
CI, 8-24
CSE
n
, 8-25
GBL, 8-25
TBST, 8-23, 9-13
TC
n
, 8-24, 9-19
TSIZ
n
, 8-22, 9-13
TT
n
, 8-19, 9-13
WT, 8-24
address transfer start
TS, 8-14, 9-11
address transfer termination
AACK, 8-26
ARTRY, 4-21, 8-26
terminating address transfer, 9-19
arbitration signals, 8-11, 9-6
bus arbitration
ABB, 8-12, 9-7
BG, 8-11, 9-6
BR, 8-11, 9-6
bus parking, 9-11
tenure, 9-6
Address bus parity signals, 8-1
Address calculation
branch instructions, 3-26
effective address, 3-9
floating-point load and store, 3-24
integer load and store, 3-19
Address matching, 11-5
Address queue, 4-2
Address translation,
see
Memory management unit
Addressing conventions
addressing modes, 3-8
alignment, 3-2
Aligned data transfer, 3-1, 9-14, 9-18
Alignment, 5-4
data transfers, 3-1, 9-14
exception, 5-28, 6-15
rules, 3-2
A
n
signals, 8-15
AND, 11-5, 11-6
APE signal, 8-18, 9-12
AP
n
signals, 8-17
Arbitration, system bus, 9-9, 9-21
ARTRY signal, 4-21, 8-26
Asserted, 8-1
Asynchronous
maskable, 5-3
nonmaskable, 5-3
Atomic memory references
stwcx.
, 3-28
using
lwarx/stwcx.
, 4-20
Automatic power reduction mode, 10-1
B
Base/decrementer registers, 10-2
BAT, 1-3, 4-11
BAT registers
G2_LE only (BAT4–BAT7), 2-18
BE, 5-13
IABR, 11-4
IABR2, 11-4
BG signal, 8-11, 9-6
bidirectional signals, 8-3
BIU, 4-2, 4-8
Block address translation, 4-34, 4-39, 6-20
BAT registers
implementation of BAT array, 2-18
block address translation flow, 6-11
lower, 4-35, 4-39
selection of block address translation, 6-9
upper, 4-35, 4-39
Block size mask, 2-19
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.