
5-12
G2 PowerPC Core Reference Manual
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MOTOROLA
Exception Processing
Figure 5-5. Special-Purpose Registers (SPRG0–SPRG7)
Table 5-6 describes conventional uses of SPRG4 –SPRG7 for the G2_LE core.
5.2.1.4
MSR Bit Settings
The MSR is shown in Figure 5-6. When an exception occurs, MSR bits, as described in
Table 5-7, are altered as determined by the exception.
Figure 5-6. Machine State Register (MSR)
Table 5-7 shows the bit definitions for the MSR. Full function reserved bits are saved in
SRR1 when an exception occurs; partial function reserved bits are not saved.
Table 5-6. Conventional Uses of SPRG4–SPRG7
Register
Description
SPRG4
Software may load a unique physical address in this register to identify an area of memory reserved for use
by the first-level exception handler. This area must be unique for each processor in the system.
SPRG5
SPRG5 may be used as a scratch register by the first-level exception handler to save the content of a GPR.
That GPR then can be loaded from SPRG4 and used as a base register to save other GPRs to memory.
SPRG6
SPRG6 may be used by the operating system as needed.
SPRG7
SPRG7 may be used by the operating system as needed.
Table 5-7. MSR Bit Settings
Bits
Name
Description
0
—
Reserved. Full function.
1–4
—
Reserved. Partial function.
5–9
—
Reserved. Full function.
10–12
—
Reserved. Partial function.
13
POW
Power management enable (implementation-specific)
0 Disables programmable power modes (normal operation mode)
1 Enables programmable power modes (nap, doze, or sleep mode)
This bit controls the programmable power modes only; it has no effect on dynamic power
management (DPM). MSR[POW] may be altered with an
mtmsr
instruction only. Also, when
altering the POW bit, software may alter only this bit in the MSR and no others. The
mtmsr
instruction must be followed by a context-synchronizing instruction.
See Chapter 10, “Power Management,” for more information.
SPRG
n
0
31
0
12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
Reserved
0 0 0 0 0 0 0 0 0 0 0 0 0
POW
TGPR
ILE EE PR FP ME FE0 SE BE FE1
0
IP
IR DR
0 0
RI
LE
F
Freescale Semiconductor, Inc.
n
.