
8-6
G2 PowerPC Core Reference Manual
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MOTOROLA
Signal Configurations
8.2.3
Signal Summary
Table 8-4 provides alphabetically-ordered G2 core signals with related cross-reference that
are relevant to the user. It details the signal name, signal grouping, number of signals, and
whether the signal is an input or an output. It also lists which output enable, input enable
and high-impedance control signal corresponds to the signal. Finally, the table provides a
pointer to the section in this chapter where the signal function is described.
Table 8-3. Truth Table for Bidirectional Signals
core_xxx_tre
core_xxx_oe
Output on Node N
Address/Data Bus/Control
0
0
1
Drive output
0
1
1
Drive output
1
0
0
High Impedance
1
1
1
Drive output
Table 8-4. G2 Core Signal Cross Reference
Signal
(or Signal Pair)
Signal Name
Functional
Grouping
Corresponding
ien, oe, and tre
No. of
Signals
I/O
Section
No.
core_32bitmode
32-bit mode
Reset config.
—
1
I
8.3.10.3.1
core_a_in[0:31]
Address bus
Address transfer
—
32
I
8.3.3.1
core_a_out[0:31]
core_a_oe
32
O
core_a_oe
Address bus output
enable
Output enable
—
1
O
core_a_tre
Address bus
high-impedance enable
High-impedance
control
—
1
I
core_aack
Address acknowledge
Address termination —
1
I
8.3.5.1
core_abb_in
Address bus busy
Address arbitration
—
1
I
8.3.1.3
core_abb_out
core_abb_oe
1
O
core_abb_oe
abb output enable
Output enable
—
1
O
core_abb_tre
abb high-impedance
enable
High-impedance
control
—
1
I
core_ap_in[0:3]
Address bus parity
Address transfer
core_ap_ien
4
I
8.3.3.2
core_ap_out[0:3]
core_a_oe
4
O
core_ap_ien
Address bus parity input
enable
Input enable
—
1
O
core_ape
Address parity error
Address transfer
core_ape_oe
1
O
8.3.3.3
core_ape_oe
ape output enable
Output enable
—
1
O
core_ape_tre
ape high-impedance
enable
High-impedance
control
—
1
I
F
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