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參數(shù)資料
| 型號(hào)： | MT9071 |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | Quad T1/E1/J1 Transceiver(多端口 T1/E1/J1幀調(diào)節(jié)器（集成四個(gè)獨(dú)立幀調(diào)節(jié)器）) |
| 中文描述： | 四T1/E1/J1收發(fā)器（多端口的T1/E1/J1幀調(diào)節(jié)器（集成四個(gè)獨(dú)立幀調(diào)節(jié)器）） |
| 文件頁(yè)數(shù)： | 65/217頁(yè) |
| 文件大?。?/td> | 686K |
| 代理商： | MT9071 |
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Preliminary Information
MT9071
65
11.0 Data Link Operation
11.1 T1 Data Link Operation
The ESF protocol allows for carrier messages to be embedded in the overhead bit (S-bit) position. Refer to the
FDL bit detailed in Table 7 - T1 ESF Superframe Structure. The MT9071 provides two separate means of
accessing these data links.
With dedicated data registers for transmitting and receiving Bit-Oriented Messages.
With an internal HDLC operating at a bit rate of 4 kbits/sec.
11.1.1
T1 Bit-Oriented Messaging
For the structure of the Bit-Oriented Messages, refer to Table 22 - T1 Message Oriented Performance Report
Structure (T1.403 and T1.408) and Table 23 - Bit Oriented Messages. Bit oriented messages may be
periodically interrupted (up to once per second) for a duration of up to 100 milliseconds. This is to
accommodate bursts of message oriented protocols.
In T1 mode, bit oriented messaging may be selected by setting control register bit BOMEN (Table 90 - T1
HDLC & DataLink Control - R/W Address Y06). The transmit data link will contain the repeating serial data
stream of the form 1111 1111 0xxx xxx0, where the 0xxx xxx0 byte originates from the transmit data register
bits TXBOM7-0 (Table 92 - T1 Transmit BOM Data - R/W Address Y07).
The receive data link will also contain a repeating serial data stream of the form 1111 1111 0xxx xxx0, where
the 0xxx xxx0 byte is sourced to the receive data register bits RXBOM7-0 (Table 108 - T1 Receive Bit Oriented
Message - R Address Y12). To prevent spurious inputs from creating false messages, a new message must be
repeated in at least 8 of the last 10 appropriate byte positions before being loaded into the receive data register
bits RXBOM7-0. When a new message has been received, and if RXBOM7-0 changes state, the following
events will occur:
The latched status register bit BOML = 1 (Table 134 - T1 Receive Line Status and Timer Latch - R
Address Y25).
The interrupt status register bit BOMI = 1 (Table 151 - T1 Receive Line and Timer Interrupt Status - R
Address Y35), if unmasked with mask control register bit BOMM = 0 (Table 158 - T1 Receive Line and
Timer Interrupt Mask - R/W Address Y45).
A bit oriented match register is also available. The control register bits RXBOMM7-0 (Table 94 - T1 Receive
BOM Match Control - R/W Address Y08) are internally compared with the receive data register bits RXBOM7-
0. When a new message has been received, and if RXBOM7-0 changes state and matches RXBOMM7-0, the
following events will occur:
The latched status register bit BOMML = 1 (Table 134 - T1 Receive Line Status and Timer Latch - R
Address Y25).
The interrupt status register bit BOMMI = 1 (Table 151 - T1 Receive Line and Timer Interrupt Status - R
Address Y35), if unmasked with mask control register bit BOMMM = 0 (Table 158 - T1 Receive Line and
Timer Interrupt Mask - R/W Address Y45).
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相關(guān)代理商/技術(shù)參數(shù) |
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| MT90710 | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:High-Speed Isochronous Multiplexer |
| MT90710AP | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:High-Speed Isochronous Multiplexer |
| MT9072 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Octal T1/E1/J1 Framer |
| MT9072AB | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Octal T1/E1/J1 Framer |
| MT9072AV | 制造商:Microsemi Corporation 功能描述:FRAMER E1/J1/T1 3.3V 256BGA - Trays 制造商:Zarlink Semiconductor Inc 功能描述:FRAMER E1/J1/T1 3.3V 256BGA - Trays |
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