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參數(shù)資料
| 型號： | MT9071 |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | Quad T1/E1/J1 Transceiver(多端口 T1/E1/J1幀調(diào)節(jié)器（集成四個(gè)獨(dú)立幀調(diào)節(jié)器）) |
| 中文描述： | 四T1/E1/J1收發(fā)器（多端口的T1/E1/J1幀調(diào)節(jié)器（集成四個(gè)獨(dú)立幀調(diào)節(jié)器）） |
| 文件頁數(shù)： | 60/217頁 |
| 文件大?。?/td> | 686K |
| 代理商： | MT9071 |
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MT9071
Preliminary Information
60
protocol that is specified in CCITT recommendation X.25. Differences between these protocols is limited to
procedural functions handled by the high level data link controller, and consequently, protocols are not limited
by the physical layer hardware (i.e. MT9071). Therefore, if required, the high level data link controller must be
provided for with external components, the MT9071 does not provide high level data link control for CCS (only
for data link). However, the MT9071 does provide a very convenient interface to numerous high level data link
control devices such as the Siemens PEB 20320 Multichannel Network Interface Controller for HDLC
(MUNICH32).
Access to the CCS PCM channel transmit and receive bytes may be either through ST-BUS channels at the
CSTi and CSTo pins, or through the ST-BUS channels at the DSTi and DSTo pins. If the DST pins are used, the
mapping of PCM channel to ST-BUS channel is fixed (see Table 28 - T1 DS1 & ST-BUS DSTi/DSTo Timeslot
Relationship and Table 29 - E1 PCM30 & ST-BUS DSTi/DSTo Timeslot Relationship). If the CST pins are used,
then mapping of PCM channel to ST-BUS channel is programmable. Regardless of which method is used
(DSTi or CSTi), data will always be output at DSTo. The CST method is convenient in most applications when
used with a multichannel HDLC (or LAPD) type of controller.
9.1
T1 CCS & ST-BUS CSTi/CSTo
In T1 CCS, a single DS1 channel is used to carry signaling information for all 23 payload channels in a framed
and formatted data packet according to some high level data link control method as described above. Typically
channel 24 is used for this purpose, however, Bellcore GR-303 specifies that any one channel may be required
for CCS. The MT9071 accommodates these requirements.
T1 CCS mode is enabled with control register bit CSIGEN (see Table 86 - T1 Signalling Control - R/W Address
Y04). Any one DS1 channel can be transparently mapped to any one CSTi/CSTo timeslot (0 to 23 only) with
control register bits PCM4-0 and CST4-0 (see Table 100 - T1 CCS Map Control - R/W Address Y0B). All
unselected CSTo timeslots are high impedance. Consequently, it is possible to connect up to 32 transceiver
CSTi/CSTo streams together, to accommodate a single common channel signaling resource such as a 32
channel HDLC controller.
9.1.1
T1 CCS & ST-BUS CSTi/CSTo Timeslot Relationship
See Table 17 - T1 DS1 & ST-BUS CSTi/CSTo Timeslot Relationship.
9.2
E1 CCS
In E1 CCS, up to three PCM30 timeslots are used to carry signaling information for all 30 payload channels in
a framed and formatted data packet according to some high level data link control method as described above.
Typically, timeslot 16 is used for this purpose, however, ETS 300 347-1 V5.2 specifies that timeslots 15, 16 and
31 may be required for CCS. The MT9071 accommodates these requirements.
E1 CCS mode is enabled with control register bit CSIG (see Table 85 - E1 DL, CCS, CAS and Other Control -
R/W Address Y03). Up to three PCM30 timeslots can be transparently mapped to any three CSTi/CSTo
timeslots. The three PCM30 timeslots are mapped with control register bits TS31E, TS16E and TS15E (see
Table 91 - E1 HDLC and CCS ST-BUS Control - R/W Address Y06). The three CSTi/CSTo timeslots are
mapped with control register bits 31C4-0, 16C4-0 and 15C4-0 (see Table 93 - E1 CCS CSTi and CSTo Map
Control - R/W Address Y07). All unsettled CSTo timeslots are high impedance. Consequently, it is possible to
DS1 Timeslot or Channel
Any one channel of 1-24
ST-BUS 2.048Mb/s CSTi/CSTo Timeslot
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 -
Table 17 - T1 DS1 & ST-BUS CSTi/CSTo Timeslot Relationship
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| MT90710 | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:High-Speed Isochronous Multiplexer |
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| MT9072 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Octal T1/E1/J1 Framer |
| MT9072AB | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Octal T1/E1/J1 Framer |
| MT9072AV | 制造商:Microsemi Corporation 功能描述:FRAMER E1/J1/T1 3.3V 256BGA - Trays 制造商:Zarlink Semiconductor Inc 功能描述:FRAMER E1/J1/T1 3.3V 256BGA - Trays |
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