
MT9071
Preliminary Information
100
20.5 E1 Unique Framer Registers Bit Summary - Address Y00 - YC4
Tables 79 to 161 describe the bit summary for the E1 Unique Framer Registers in the MT9071.
Binary
Address
Hex
Address
(A
11
-A
0
)
Y00
R/W
Register
Register Bits (B15-B8 / B7-B0)
Table 79
R/W E1 Alarms and Framing
Control
R/W E1 Test, Error and Loopback
Control
R/W E1 Interrupts and I/O Control
#, ASEL, ARAI, TALM, TAIS, TAIS0, TAI16, TE, TIU0,
TIU1, CSYN, REFRM, AUTC, CRCM, AUTY, MFRF
#, #, L32Z, ADSEQ, DLBK, RSV, SLBK, PLBK, E1,
E2, BVE, CRCE, FASE, NFSE, LOSE, PERR
COD1, COD0, HDB3, T2OP, TXMFE, TX8KE,
SPND, INTA, CLKE, #, RXBFE, RXDO, RXCO,
CSTOE, DSTOE, MFSEL
#, #, #, #, #, #, #, #, #, ELAS, ACCLR, RXTRS,
TXTRS, CSIG, CNCLR, RST
#, #, #, #, #, #, #, #, #, #, #, #, #, #, #, #, SIP1-0
#, #, #, #, RFL, DBNCE, #, #, TMA1-4, X1, Y, X2, X3
#, #, #, #, HCH4-1, HCH1, HPAYSEL, RSV, RSV,
RSV, TS31E, TS16E, TS15E
#, 31C4-0, 16C4-3, 16C2-0, 15C4-0
Table 81
Y01
Table 83
Y02
Table 85
Y03
R/W E1 DL, CCS, CAS and Other
Control
R/W E1 Signaling Control
R/W E1 CAS Control and Data
R/W E1 HDLC and CCS ST-BUS
Control
R/W E1 CCS CSTi and CSTo Map
Control
R/W E1 Data Link Control
Table 87
Table 89
Table 91
Y04
Y05
Y06
Table 93
Y07
Table 95
Y08
#, SA4S1-0, SA5S1-0, SA6S1-0, SA7S1, SA7S0,
SA8S1-0, #, #, #, RSV, RSV
#, #, #, #, #, #, #, #, RXIDC7-0
#, #, #, #, #, #, #, #, TXIDC7-0
Table 97
Table 99
Y09
Y0A
Table 60 - E1 Master Control 1 Register Bit Summary - Address Y00-Y0A
R/W E1 Receive Idle Code Data
R/W E1 Transmit Idle Code Data
Binary
Address
Hex
Address
(A
11
-A
0
)
Y10
R/W
Register
Register Bits (B15-B8 / B7-B0)
Table 105
R
E1 Synchronization & CRC-4 Remote
Status
#, RSLP, RSLPD, BSYNC, MSYNC, CSYNC,
RED, CEFS, #, RCRC0, RCRC1, RFAIL,
REB1-2, RCRCR, CRCIW
#, #,ONESEC, TWOSEC, T1, T2, T400, T8, #,
#, #, CALN, CRCRF, CRCS1, CRCS2, #
#, #, KLVE, LOSS, AIS16, AIS, RAI, AUXP,
RMA1-4, X1, Y, X2, X3
RIU1, RNFA, RAI, RNU4-8, RIU0, RFA2-8
#, #, #, #, PI11-0
PEC7-0, PCC7-0
Table 107
Y11
R
E1 CRC-4 Timers & CRC-4 Local
Status
E1 Alarms & MAS Status
Table 109
Y12
R
Table 111
Table 113
Table 115
Y13
Y14
Y15
R
R
E1 NFAS Signal and FAS Status
E1 Phase Indicator Status
R/W E1 PRBS Error Counter & PRBS CRC
Multiframe Counter
R/W E1 Loss of Basic Frame Sync Counter SLC15-0
R/W E1 E-bit Error Counter
R/W E1 Bipolar Violation Error Counter
R/W E1 CRC-4 Error Counter
R/W E1 FAS Bit Error Counter & FAS Error
Counter
Table 61 - E1 Master Status Register Bit Summary - Address Y10-Y1A
Table 117
Table 119
Table 121
Table 123
Table 125
Y16
Y17
Y18
Y19
Y1A
EEC15-0
VEC15-0
CEC15-0
BEC7-0, FEC7-0