
MT9071
Preliminary Information
132
Bit
Name
Functional Description
15
14
13
(#)
Not Used
Receive Slip.
This bit changes state when a receive controlled frame slip has occurred.
Receive Slip Direction.
If one, indicates that the last received frame slip (RSLP of this register)
resulted in a repeated frame. This would occur if the system clock (CKb/2) was faster than the
network clock (RxCK). If zero, indicates that the last received frame slip (RSLP) resulted in a lost
frame. This would occur if the system clock was slower than the network clock. Updated on an
RSLP occurrence basis.
Receive Basic Frame Alignment.
If zero, indicates the received PCM30 link basic frame
alignment pattern (x0011011 in timeslot 0 of alternate frames) is acquired; if one, the basic
frame alignment pattern is lost or not acquired.
MSYNC
Receive Multiframe Alignment.
If zero, indicates the received PCM30 link signaling multiframe
alignment signal (0000xxxx in timeslot 16 of every16th frame) is acquired; if one, the signaling
multiframe alignment signal is lost or not acquired.
CSYNC
Receive CRC-4 Synchronization.
If zero, indicates the received PCM30 link CRC-4 multiframe
alignment pattern (001011xx in timeslot 0, in bit position 1 of 16 alternate frames) is acquired; if
one, the CRC-4 multiframe alignment pattern is lost or not acquired.
RED
RED Alarm.
If one, indicates that basic frame alignment (BSYNC of this register) has been lost
for at least 100 msec. This bit is cleared (zero) when basic frame alignment is acquired.
CEFS
Consecutively Errored Frame Alignment Signal.
If one, the last two frame alignment signals
(FAS=0011011) were received in error. If zero, at least one of the last two frame alignment
signals were received without error. A non-errored FAS would result in the RFA2-8 status bits
(see Table 111 - E1 NFAS Signal and FAS Status - R Address Y13) set as follows, 0011011.
This bit is low when BSYNC is low.
(#)
Not Used
RCRC0
Remote CRC-4 and RAI T10.
If one, the received A bits were one and either of the received E
bits were zero (see RCRCR of this register) continuously for more than 10ms. See I.431 section
3.4.1.2 on RAI and continuous CRC error information.
RCRC1
Remote CRC-4 and RAI T450.
If one, the received A bits were one and the received E bits were
zero (see RCRCR of this register) continuously for more than 10ms but less than 450ms. See
I.431 section 3.4.1.2 on RAI and continuous CRC error information.
RFAIL
Remote CRC-4 Multiframe Generator/Detector Failure.
If one, each of the previous five
seconds have an E-bit (E1 + E2) of error count of greater than 989 (E-bit counter 3DD hex or 11
1101 1101, see Table 119 - E1 E-bit Error Counter - R/W Address Y17), and for this same period
the receive RAI bit (see Table 111 - E1 NFAS Signal and FAS Status - R Address Y13) was zero
(no remote alarm), and for the same period the BSYNC bit (of this register) was equal to zero
(basic frame alignment has been maintained). If zero, indicates normal operation.
REB1
Receive E1 Bit Status.
Indicates the status of the bit (E1) received on the PCM30 link in bit
position 1 of timeslot 0 in non-frame alignment signal (NFAS) frame 13. If zero, the remote end
calculated a CRC-4 error in its received sub-multiframe one. If one, no error was calculated.
Note that with the CSYNC bit (of this register) at one, the REB1 bit is one.
REB2
Receive E2 Bit Status.
Indicates the status of the bit (E2) received on the PCM30 link in bit
position 1 of timeslot 0 in non-frame alignment signal (NFAS) frame 15. If zero, the remote end
calculated a CRC-4 error in its received sub-multiframe two. If one, no error was calculated.
Note that with the CSYNC bit (of this register) at one, the REB2 bit is one.
RCRCR
Remote CRC-4 and RAI.
This bit is one when the RAI (A) status bit (see Table 111 - E1 NFAS
Signal and FAS Status - R Address Y13) is one, and either the REB1 (E1) or REB2 (E2) status
bits (of this register) are zero. If zero, the above requirement is not met. This bit is updated with
the PRBS CRC-4 multiframe counter clock (see Table 115 - E1 PRBS Error Counter & PRBS
CRC Multiframe Counter - R/W Address Y15).
Table 105 - E1 Synchronization & CRC-4 Remote Status - R Address Y10
RSLP
RSLPD
12
BSYNC
11
10
9
8
7
6
5
4
3
2
1