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參數(shù)資料
| 型號(hào)： | MT9071 |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | Quad T1/E1/J1 Transceiver(多端口 T1/E1/J1幀調(diào)節(jié)器（集成四個(gè)獨(dú)立幀調(diào)節(jié)器）) |
| 中文描述： | 四T1/E1/J1收發(fā)器（多端口的T1/E1/J1幀調(diào)節(jié)器（集成四個(gè)獨(dú)立幀調(diào)節(jié)器）） |
| 文件頁(yè)數(shù)： | 117/217頁(yè) |
| 文件大小： | 686K |
| 代理商： | MT9071 |
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Preliminary Information
MT9071
117
1
UNIBI
(0)
Unipolar/Bipolar.
If one the input and output at the framer-LIU interface is assumed to be
unipolar. The stream RPOS is the input and TPOS is the output. Setting this bit low causes the
device to accept complementary bipolar inputs on RPOS/RNEG and to transmit
complementary outputs on TPOS/TNEG. This is normally set to zero.
Clock Edge.
If one, the NRZ data at the framer-LIU interface (RPOS/RNEG and TPOS/
TNEG) is sampled on the rising edge of the extracted clock and transmitted on the falling edge
of the transmitted clock. If zero, the opposite edges are used. This selection is only applicable
in NRZ mode. This is normally set to zero.
Table 80 - T1 Line Coding Control - R/W Address Y01
0
CLKE
(0)
Bit
Name
Functional Description
15-14
13
(00)
L32Z
(0)
Not Used
Digital Loss of Signal Selection
. If one, the threshold for digital loss of signal is 32 successive
zeros. If zero, the threshold is set to 192 successive zeros. See the LOSS bit detailed in Table
109 - E1 Alarms & MAS Status - R Address Y12.
Digital Milliwatt or Digital Test Sequence.
If one, the A-law digital milliwatt analog test
sequence will be selected by the Per Timeslot Control bits TTSTn and RTSTn (see Table 167 -
E1 Per Timeslot 0 to 31 Control Registers - R/W Address Y90-YAF). If zero, the PRBS 2
15
-1 bit
error rate test sequence will be selected by control bits TTSTn and RTSTn. The PRBS
generator is reset whenever this bit is set to 1.
Digital Loopback.
If one, all timeslots of DSTi are connected to DSTo at the framer to LIU
interface point of the selected framer (Y). If zero, this feature is disabled. See Section 16.0
Loopbacks.
Reserved
. Must be set to 0 for normal operation.
12
ADSEQ
(0)
11
DLBK
(0)
10
RSV
(0)
SLBK
(0)
PLBK
(0)
9
ST-BUS Loopback.
If one, all timeslots of DSTi are connected to DSTo on the ST-BUS side of
the selected framer (Y). If zero, this feature is disabled. See Section 15.0 Loopbacks.
Payload Loopback.
If one, all timeslots received on RTIP/RRNG are connected to TTIP/TRNG
on the ST-BUS side of the selected framer (Y) (this excludes time-slot 0). If zero, this feature is
disabled. See Section 15.0 Loopbacks.
E1 Error Insertion.
A zero-to-one transition of this bit inserts a single E1 error into the transmit
PCM 30 data (bit position 1 of frame 13 of the CRC-4 Multiframe). A one, zero or one-to-zero
transition has no function.
E2 Error Insertion.
A zero-to-one transition of this bit inserts a single E2 error into the transmit
PCM 30 data (bit position 1 of frame 15 of the CRC-4 Multiframe). A one, zero or one-to-zero
transition has no function.
Bipolar Violation Error Insertion.
A zero-to-one transition of this bit inserts a single bipolar
violation error into the transmit PCM 30 data. A one, zero or one-to-zero transition has no
function.
CRC-4 Error Insertion.
A zero-to-one transition of this bit inserts a single CRC-4 error into the
transmit PCM 30 data. A one, zero or one-to-zero transition has no function.
Frame Alignment Signal Error Insertion.
A zero-to-one transition of this bit inserts a single
error into the timeslot zero frame alignment signal of the transmit PCM 30 data. A one, zero or
one-to-zero transition has no function.
Non-frame Alignment Signal Error Insertion.
A zero-to-one transition of this bit inserts a
single error into bit two of the timeslot zero non-frame alignment signal of the transmit PCM 30
data. A one, zero or one-to-zero transition has no function.
Table 81 - E1 Test, Error and Loopback Control - R/W Address Y01
8
7
E1
(0)
6
E2
(0)
5
BVE
(0)
4
CRCE
(0)
FASE
(0)
3
2
NFSE
(0)
Bit
Name
Functional Description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MT9072 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
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| MT90823 | 3V Large Digital Switch(3V 大數(shù)字開關(guān)) |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT90710 | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:High-Speed Isochronous Multiplexer |
| MT90710AP | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:High-Speed Isochronous Multiplexer |
| MT9072 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Octal T1/E1/J1 Framer |
| MT9072AB | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Octal T1/E1/J1 Framer |
| MT9072AV | 制造商:Microsemi Corporation 功能描述:FRAMER E1/J1/T1 3.3V 256BGA - Trays 制造商:Zarlink Semiconductor Inc 功能描述:FRAMER E1/J1/T1 3.3V 256BGA - Trays |
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