
MT9071
Preliminary Information
108
Bit
Name
Functional Description
15
X3HM
(0)
E1 Transceiver 3 HDLC Mask.
This is the mask bit for the corresponding Transceiver 3 X3HI bit in
the E1 Interrupt Vector Status - R Address 910. If this mask bit is one, the interrupt bit will remain
inactive. If this mask bit is zero, the interrupt bit will function normally.
E1 Transceiver 3 National Mask.
This is the mask bit for the corresponding Transceiver 3 X3NI bit
in the E1 Interrupt Vector Status - R Address 910. If this mask bit is one, the interrupt bit will remain
inactive. If this mask bit is zero, the interrupt bit will function normally.
E1 Transceiver 3 Counter Mask.
This is the mask bit for the corresponding Transceiver 3 X3CI bit
in the E1 Interrupt Vector Status - R Address 910. If this mask bit is one, the interrupt bit will remain
inactive. If this mask bit is zero, the interrupt bit will function normally.
E1 Transceiver 3 Sync Mask.
This is the mask bit for the corresponding Transceiver 3 X3SI bit in
the E1 Interrupt Vector Status - R Address 910. If this mask bit is one, the interrupt bit will remain
inactive. If this mask bit is zero, the interrupt bit will function normally.
E1 Transceiver 2 HDLC Mask.
This is the mask bit for the corresponding Transceiver 2 X2HI bit in
the E1 Interrupt Vector Status - R Address 910. If this mask bit is one, the interrupt bit will remain
inactive. If this mask bit is zero, the interrupt bit will function normally.
E1 Transceiver 2 National Mask.
This is the mask bit for the corresponding Transceiver 2 X2NI bit
in the E1 Interrupt Vector Status - R Address 910. If this mask bit is one, the interrupt bit will remain
inactive. If this mask bit is zero, the interrupt bit will function normally.
E1 Transceiver 2 Counter Mask.
This is the mask bit for the corresponding Transceiver 2 X2CI bit
in the E1 Interrupt Vector Status - R Address 910. If this mask bit is one, the interrupt bit will remain
inactive. If this mask bit is zero, the interrupt bit will function normally.
E1 Transceiver 2 Sync Mask.
This is the mask bit for the corresponding Transceiver 2 X2SI bit in
the E1 Interrupt Vector Status - R Address 910. If this mask bit is one, the interrupt bit will remain
inactive. If this mask bit is zero, the interrupt bit will function normally.
E1 Transceiver 1 HDLC Mask.
This is the mask bit for the corresponding Transceiver 1 X1HI bit in
the E1 Interrupt Vector Status - R Address 910. If this mask bit is one, the interrupt bit will remain
inactive. If this mask bit is zero, the interrupt bit will function normally.
E1 Transceiver 1 National Mask.
This is the mask bit for the corresponding Transceiver 1 X1NI bit
in the E1 Interrupt Vector Status - R Address 910. If this mask bit is one, the interrupt bit will remain
inactive. If this mask bit is zero, the interrupt bit will function normally.
E1 Transceiver 1 Counter Mask.
This is the mask bit for the corresponding Transceiver 1 X1CI bit
in the E1 Interrupt Vector Status - R Address 910. If this mask bit is one, the interrupt bit will remain
inactive. If this mask bit is zero, the interrupt bit will function normally.
E1 Transceiver 1 Sync Mask.
This is the mask bit for the corresponding Transceiver 1 X1SI bit in
the E1 Interrupt Vector Status - R Address 910. If this mask bit is one, the interrupt bit will remain
inactive. If this mask bit is zero, the interrupt bit will function normally.
E1 Transceiver 0 HDLC Mask.
This is the mask bit for the corresponding Transceiver 0 X0HI bit in
the E1 Interrupt Vector Status - R Address 910. If this mask bit is one, the interrupt bit will remain
inactive. If this mask bit is zero, the interrupt bit will function normally.
E1 Transceiver 0 National Mask.
This is the mask bit for the corresponding Transceiver 0 X0NI bit
in the E1 Interrupt Vector Status - R Address 910. If this mask bit is one, the interrupt bit will remain
inactive. If this mask bit is zero, the interrupt bit will function normally.
E1 Transceiver 0 Counter Mask.
This is the mask bit for the corresponding Transceiver 0 X0CI bit
in the E1 Interrupt Vector Status - R Address 910. If this mask bit is one, the interrupt bit will remain
inactive. If this mask bit is zero, the interrupt bit will function normally.
E1 Transceiver 0 Sync Mask.
This is the mask bit for the corresponding Transceiver 0 X0SI bit in
the E1 Interrupt Vector Status - R Address 910. If this mask bit is one, the interrupt bit will remain
inactive. If this mask bit is zero, the interrupt bit will function normally.
Table 72 - E1 Interrupt Vector Mask - R/W Address 902
14
X3NM
(0)
13
X3CM
(0)
12
X3SM
(0)
11
X2HM
(0)
10
X2NM
(0)
9
X2CM
(0)
8
X2SM
(0)
7
X1HM
(0)
6
X1NM
(0)
5
X1CM
(0)
4
X1SM
(0)
3
X0HM
(0)
2
X0NM
(0)
1
X0CM
(0)
0
X0SM
(0)