
MT9071
Preliminary Information
180
Bit
Name
Functional Description
15
RSV
(0)
RSV
(00)
RSV
(0)
RSV
(0)
RSV
(0)
RLBK
(0)
MLBK
(0)
RSV
(0)
RSV
(0)
ELOS
(0)
Reserved.
Set to zero for normal operation.
14
13
12
Reserved
. Must be 00 for normal operation.
Reserved.
Must be 0 for normal operation.
11
Reserved.
Must be 0 for normal operation.
10
Reserved.
Must be 0 for normal operation.
9
Remote Loopback
. If one, RTIP/RRNG are connected to TTIP/TRNG at the PCM30 side of
the selected framer (Y). If zero, this feature is disabled. See Section 15.0 Loopbacks.
Metallic Loopback
. If one, DSTi is connected to DSTo at the PCM30 side of the selected
framer (Y). If zero, this feature is disabled. See Section 15.0 Loopbacks.
Reserved.
Set to zero for normal operation.
8
7
6
Reserved.
Set to zero for normal operation.
5
E1 LLOS Threshold Criteria.
For E1 mode only. This bit sets the criteria for the LIU loss of
signal status register bit LLOS described in Table 170 T1 & E1 LIU and JA Status - R Address
YE0. If one, the analog loss of signal threshold to is set to 20dB below nominal. If zero, the
analog loss of signal threshold is set to 40 dB below nominal.
Receive Equalizer Control
. Setting these bits selects the equalization type applied to the
incoming line data.
REQC1
REQC0
Receive Equalization
0
0
Manual Equalization with control register bits REQM2-0 of this register
0
1
Automatic Equalization with Algorithm 1 - recommended default
1
0
Automatic Equalization with Algorithm 2 - for test purposes
1
1
Automatic Equalization with Algorithm 3 - with control bits detailed in
Table 176 - T1 & E1 LIU Receive Equalizer Threshold Control - R/W
Address YE6, typically set to HEX BB30.
Receive Equalization Manual
.Setting these pins forces a manual level of equalization of the
incoming line data.
REQM2
REQM1
REQM0
Receive Equalization
0
0
0
none
0
0
1
8 dB
0
1
0
16 dB
0
1
1
24 dB
1
0
0
32 dB
1
0
1
40 dB
1
1
0
48 dB
1
1
1
reserved
These settings only have effect if control register bits REQC1,0 (this register) are set to 00.
Table 173 - T1 & E1 LIU Control - R/W Address YE3
4
3
REQC1
REQC0
(00)
2
1
0
REQM2
REQM1
REQM0
(000)
Bit
Name
Functional Description
15
RSV
(0)
Table 174 - T1 & E1 LIU Transmit Pulse Phase 1 & Phase 2 Data - R/W Address YE4
Reserved.
Must be kept at zero for normal operation.