
MT9071
Preliminary Information
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1.6
Interface to the System Backplane
On the system side the MT9071 framers can interface to a 2.048Mbit/s or 8.192Mbit/s ST-BUS backplane.
1.7
Framing Modes
The MT9071 framers operate in either termination or transparent modes. In the receive transparent mode, the
received line data is channelled to the DSTo pin with arbitrary frame alignment. In the transmit transparent
mode, no framing is imposed on the data transmitted from the DSTi pin onto the line.
In T1 mode, the framers operate in any of the following framing modes: D4, Extended Superframe (ESF) or
T1DM.
In E1 mode, the framers run three framing algorithms: basic frame alignment, signalling multiframe alignment
and CRC-4 multiframe alignment. The Remote Alarm Indication (RAI) bit is automatically controlled by an
internal state machine.
1.8
Access to the Maintenance Channel
The T1 ESF Facility Data Link (FDL) bits can be accessed in the following three ways: Receive FDL through
the RxD pin; transmit and receive FDL through internal registers for Bit Oriented Messages; through the
embedded HDLC.
In E1 mode, the Sa bits (bits 4-8 of the non-frame alignment signal) can be accessed in four ways: Receive
data link through the RxD pin; transmit and receive data link through single byte transmit and receive registers;
through five byte transmit and receive national bit buffers; through the embedded HDLC.
1.9
Robbed Bit Signaling / Channel Associated Signaling
Robbed bit signaling and channel associated information can be accessed two ways: Via the microport; via the
CSTi and CSTo pins. Signaling information is frozen upon loss of multiframe alignment.
In T1 mode, the MT9071 supports AB and ABCD robbed bit signaling. Robbed bit signaling can be enabled on
a channel by channel basis.
In E1 mode, the MT9071 supports Channel Associated Signaling (CAS) multiframing.
1.10 Common Channel Signaling
MT9071 supports Common Channel Signaling (CCS) with an embedded HDLC and with the capability to
assign CSTi/CSTo channels to transmit/receive timeslots.
In T1 mode, CCS is supported in any one channel by using the embedded HDLC. Alternatively, the CSTi and
CSTo pins can be used to map an external HDLC channel to/from any one transmit/receive T1 channel.
In E1 mode, CCS is supported in any one timeslot by using the embedded HDLC. Alternatively, the CSTi and
CSTo pins can be used to map external HDLC channels to/from any of the transmit/receive E1 timeslots 15, 16
and 31.