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6.7
Bus Release
6.7.1
Overview
The H8S/2214 can release the external bus in response to a bus request from an external device. In
the external bus released state, the internal bus master continues to operate as long as there is no
external access.
6.7.2
Operation
In external expansion mode, the bus can be released to an external device by setting the BRLE bit
in BCRL to 1. Driving the
BREQ pin low issues an external bus request to the H8S/2214. When
the
BREQ pin is sampled, at the prescribed timing the BACK pin is driven low, and the address
bus, data bus, and bus control signals are placed in the high-impedance state, establishing the
external bus-released state.
In the external bus released state, an internal bus master can perform accesses using the internal
bus. When an internal bus master wants to make an external access, it temporarily defers
activation of the bus cycle, and waits for the bus request from the external bus master to be
dropped.
When the
BREQ pin is driven high, the BACK pin is driven high at the prescribed timing and the
external bus released state is terminated.
In the event of simultaneous external bus release request and external access request generation,
the order of priority is as follows:
(High) External bus release > Internal bus master external access (Low)