
307
(2) Port B Data Register (PBDR)
7
PB7DR
0
R/W
6
PB6DR
0
R/W
5
PB5DR
0
R/W
4
PB4DR
0
R/W
3
PB3DR
0
R/W
0
PB0DR
0
R/W
2
PB2DR
0
R/W
1
PB1DR
0
R/W
Bit
:
Initial value :
R/W
:
PBDR is an 8-bit readable/writable register that stores output data for the port B pins (PB7 to
PB0).
PBDR is initialized to H'00 by a power-on reset and in hardware standby mode. It retains its
previous state after a manual reset and in software standby mode.
(3) Port B Register (PORTB)
7
PB7
—*
R
6
PB6
—*
R
5
PB5
—*
R
4
PB4
—*
R
3
PB3
—*
R
0
PB0
—*
R
2
PB2
—*
R
1
PB1
—*
R
Bit
:
Initial value :
R/W
:
Note: * Determined by the state of pins PB7 to PB0.
PORTB is an 8-bit read-only register that shows the pin states. It cannot be written to. Writing of
output data for the port B pins (PB7 to PB0) must always be performed on PBDR.
If a port B read is performed while PBDDR bits are set to 1, the PBDR values are read. If a port B
read is performed while PBDDR bits are cleared to 0, the pin states are read.
After a power-on reset and in hardware standby mode, PORTB contents are determined by the pin
states, as PBDDR and PBDR are initialized. PORTB retains its previous state after a manual reset
and in software standby mode.
(4) Port B MOS Pull-Up Control Register (PBPCR)
7
PB7PCR
0
R/W
6
PB6PCR
0
R/W
5
PB5PCR
0
R/W
4
PB4PCR
0
R/W
3
PB3PCR
0
R/W
0
PB0PCR
0
R/W
2
PB2PCR
0
R/W
1
PB1PCR
0
R/W
Bit
:
Initial value :
R/W
:
PBPCR is an 8-bit readable/writable register that controls the MOS input pull-up function
incorporated into port B on a bit-by-bit basis.
PBPCR is valid for port input and TPU input pins.