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9.11.2
Register Configuration
Table 9-20 shows the port E register configuration.
Table 9-20 Port E Registers
Name
Abbreviation
R/W
Initial Value
Address*
Port E data direction register
PEDDR
W
H'00
H'FE3D
Port E data register
PEDR
R/W
H'00
H'FF0D
Port E register
PORTE
R
Undefined
H'FFBD
Port E MOS pull-up control register
PEPCR
R/W
H'00
H'FE44
Note: * Lower 16 bits of the address.
(1) Port E Data Direction Register (PEDDR)
7
PE7DDR
0
W
6
PE6DDR
0
W
5
PE5DDR
0
W
4
PE4DDR
0
W
3
PE3DDR
0
W
0
PE0DDR
0
W
2
PE2DDR
0
W
1
PE1DDR
0
W
Bit
:
Initial value :
R/W
:
PEDDR is an 8-bit write-only register, the individual bits of which specify input or output for the
pins of port E. PEDDR cannot be read; if it is, an undefined value will be read.
PEDDR is initialized to H'00 by a power-on reset and in hardware standby mode. It retains its
previous state after a manual reset and in software standby mode.
(a)Modes 4 to 6
When 8-bit bus mode is selected, port E functions as an I/O port. Setting a PEDDR bit to 1
makes the corresponding port E pin an output port, while clearing the bit to 0 makes the pin an
input port.
When 16-bit bus mode is selected, the input/output direction settings in PEDDR are ignored,
and port E pins automatically function as data input/output pins.
For details of the 8-bit and 16-bit bus modes, see section 6, Bus Controller.
(b)Mode 7
Setting a PEDDR bit to 1 makes the corresponding port E pin an output port, while clearing the
bit to 0 makes the pin an input port.