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(2) Port E Data Register (PEDR)
7
PE7DR
0
R/W
6
PE6DR
0
R/W
5
PE5DR
0
R/W
4
PE4DR
0
R/W
3
PE3DR
0
R/W
0
PE0DR
0
R/W
2
PE2DR
0
R/W
1
PE1DR
0
R/W
Bit
:
Initial value :
R/W
:
PEDR is an 8-bit readable/writable register that stores output data for the port E pins (PE7 to PE0).
PEDR is initialized to H'00 by a power-on reset and in hardware standby mode. It retains its
previous state after a manual reset and in software standby mode.
(3) Port E Register (PORTE)
7
PE7
—*
R
6
PE6
—*
R
5
PE5
—*
R
4
PE4
—*
R
3
PE3
—*
R
0
PE0
—*
R
2
PE2
—*
R
1
PE1
—*
R
Bit
:
Initial value :
R/W
:
Note: * Determined by the state of pins PE7 to PE0.
PORTE is an 8-bit read-only register that shows the pin states. It cannot be written to. Writing of
output data for the port E pins (PE7 to PE0) must always be performed on PEDR.
If a port E read is performed while PEDDR bits are set to 1, the PEDR values are read. If a port E
read is performed while PEDDR bits are cleared to 0, the pin states are read.
After a power-on reset and in hardware standby mode, PORTE contents are determined by the pin
states, as PEDDR and PEDR are initialized. PORTE retains its previous state after a manual reset
and in software standby mode.
(4) Port E MOS Pull-Up Control Register (PEPCR)
7
PE7PCR
0
R/W
6
PE6PCR
0
R/W
5
PE5PCR
0
R/W
4
PE4PCR
0
R/W
3
PE3PCR
0
R/W
0
PE0PCR
0
R/W
2
PE2PCR
0
R/W
1
PE1PCR
0
R/W
Bit
:
Initial value :
R/W
:
PEPCR is an 8-bit readable/writable register that controls the MOS input pull-up function
incorporated into port E on a bit-by-bit basis.
PEPCR is valid for port input pins (modes 4 to 6 in 8-bit bus mode, or mode 7).