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9.5.2
Register Configuration
Table 9-7 shows the port 7 register configuration.
Table 9-7
Port 7 Registers
Name
Abbreviation
R/W
Initial Value
Address*
Port 7 data direction register
P7DDR
W
H'00
H'FE36
Port 7 data register
P7DR
R/W
H'00
H'FF06
Port 7 register
PORT7
R
Undefined
H'FFB6
External module connection output pin
select register
OPINSEL
R/W
b'-000----
H'FE4E
Note: * Lower 16 bits of the address.
(1) Port 7 Data Direction Register (P7DDR)
7
P77DDR
0
W
6
P76DDR
0
W
5
P75DDR
0
W
4
P74DDR
0
W
3
P73DDR
0
W
0
P70DDR
0
W
2
P72DDR
0
W
1
P71DDR
0
W
Bit
:
Initial value :
R/W
:
P7DDR is an 8-bit write-only register, the individual bits of which specify input or output for the
pins of port 7. P7DDR cannot be read; if it is, an undefined value will be read.
Setting a P7DDR bit to 1 makes the corresponding port 7 pin an output pin, while clearing the bit
to 0 makes the pin an input pin.
P7DDR is initialized to H'00 by a power-on reset and in hardware standby mode. It retains its
previous state after a manual reset and in software standby mode. As the 8-bit timer and SCI are
initialized by a manual reset, the pin states in this case are determined by the P7DDR and P7DR
specifications.
(2) Port 7 Data Register (P7DR)
7
P77DR
0
R/W
6
P76DR
0
R/W
5
P75DR
0
R/W
4
P74DR
0
R/W
3
P73DR
0
R/W
0
P70DR
0
R/W
2
P72DR
0
R/W
1
P71DR
0
R/W
Bit
:
Initial value :
R/W
:
P7DR is an 8-bit readable/writable register that stores output data for the port 7 pins (P77 to P70).