
xxii
Tables
Table 1-1
Overview..............................................................................................................2
Table 1-2
Pin Functions in Each Operating Mode ...............................................................
8
Table 1-3
Pin Functions........................................................................................................ 12
Table 2-1
Instruction Classification ..................................................................................... 34
Table 2-2
Combinations of Instructions and Addressing Modes ......................................... 35
Table 2-3
Instructions Classified by Function...................................................................... 38
Table 2-4
Addressing Modes................................................................................................ 48
Table 2-5
Absolute Address Access Ranges........................................................................ 50
Table 2-6
Effective Address Calculation ............................................................................. 52
Table 2-7
Exception Handling Types and Priority............................................................... 57
Table 3-1
MCU Operating Mode Selection ......................................................................... 65
Table 3-2
MCU Registers..................................................................................................... 66
Table 3-3
Relationship between
RES and MRES pin Values and Type of Reset................ 68
Table 3-3
Pin Functions in Each Mode ................................................................................ 71
Table 4-1
Exception Handling Types and Priority............................................................... 73
Table 4-2
Exception Vector Table ....................................................................................... 75
Table 4-3
Reset Types.......................................................................................................... 76
Table 4-4
Status of CCR and EXR after Trace Exception Handling ................................... 80
Table 4-5
Status of CCR and EXR after Trap Instruction Exception Handling .................. 82
Table 5-1
Interrupt Controller Pins ...................................................................................... 87
Table 5-2
Interrupt Controller Registers .............................................................................. 87
Table 5-3
Correspondence between Interrupt Sources and IPR Settings............................. 89
Table 5-4
Interrupt Sources, Vector Addresses, and Interrupt Priorities ............................. 95
Table 5-5
Interrupt Control Modes ...................................................................................... 97
Table 5-6
Interrupts Selected in Each Interrupt Control Mode (1) ...................................... 98
Table 5-7
Interrupts Selected in Each Interrupt Control Mode (2) ...................................... 99
Table 5-8
Operations and Control Signal Functions in Each Interrupt Control Mode ........ 99
Table 5-9
Interrupt Response Times .................................................................................... 105
Table 5-10
Number of States in Interrupt Handling Routine Execution Statuses.................. 105
Table 5-11
Interrupt Source Selection and Clearing Control ................................................. 110
Table 6-1
Bus Controller Pins .............................................................................................. 113
Table 6-2
Bus Controller Registers ...................................................................................... 114
Table 6-3
Bus Specifications for Each Area (Basic Bus Interface) ..................................... 128
Table 6-4
Data Buses Used and Valid Strobes..................................................................... 133
Table 6-5
Pin States in Idle Cycle ........................................................................................ 150
Table 6-6
Pin States in Bus Released State.......................................................................... 152
Table 6-7
External Module Expansion Function Pins.......................................................... 157
Table 6-8
Bus Controller Registers ...................................................................................... 157
Table 7-1
Overview of DMAC Functions (Short Address Mode) ....................................... 165
Table 7-2
Overview of DMAC Functions (Full Address Mode) ......................................... 166
Table 7-3
DMAC Pins.......................................................................................................... 167