
ix
11.3.1 Watchdog Timer Operation .................................................................................. 424
11.3.2 Interval Timer Operation ...................................................................................... 425
11.3.3 Timing of Setting of Overflow Flag (OVF).......................................................... 426
11.3.4 Timing of Setting of Watchdog Timer Overflow Flag (WOVF).......................... 426
11.4
Interrupts ............................................................................................................................ 427
11.5
Usage Notes........................................................................................................................ 428
11.5.1 Contention between Timer Counter (TCNT) Write and Increment...................... 428
11.5.2 Changing Value of CKS2 to CKS0....................................................................... 428
11.5.3 Switching between Watchdog Timer Mode and Interval Timer Mode ................ 428
11.5.4 Internal Reset in Watchdog Timer Mode.............................................................. 429
Section 12 Serial Communication Interface (SCI) ............................................ 431
12.1
Overview ............................................................................................................................ 431
12.1.1 Features ................................................................................................................. 431
12.1.2 Block Diagram ...................................................................................................... 433
12.1.3 Pin Configuration .................................................................................................. 435
12.1.4 Register Configuration .......................................................................................... 436
12.2
Register Descriptions.......................................................................................................... 437
12.2.1 Receive Shift Register (RSR)................................................................................ 437
12.2.2 Receive Data Register (RDR) ............................................................................... 437
12.2.3 Transmit Shift Register (TSR) .............................................................................. 438
12.2.4 Transmit Data Register (TDR).............................................................................. 438
12.2.5 Serial Mode Register (SMR)................................................................................. 439
12.2.6 Serial Control Register (SCR)............................................................................... 442
12.2.7 Serial Status Register (SSR).................................................................................. 445
12.2.8 Bit Rate Register (BRR)........................................................................................ 449
12.2.9 Smart Card Mode Register (SCMR) ..................................................................... 457
12.2.10 Serial Extended Mode Register 0 (SEMR0) ......................................................... 458
12.2.11 Module Stop Control Register B (MSTPCRB)..................................................... 463
12.3
Operation ............................................................................................................................ 464
12.3.1 Overview ............................................................................................................... 464
12.3.2 Operation in Asynchronous Mode ........................................................................ 467
12.3.3 Multiprocessor Communication Function ............................................................ 479
12.3.4 Operation in Clocked Synchronous Mode ............................................................ 487
12.4
SCI Interrupts ..................................................................................................................... 495
12.5
Usage Notes........................................................................................................................ 497
Section 13 D/A Converter .................................................................................................. 507
13.1
Overview ............................................................................................................................ 507
13.1.1 Features ................................................................................................................. 507
13.1.2 Block Diagram ...................................................................................................... 508
13.1.3 Pin Configuration .................................................................................................. 509
13.1.4 Register Configuration .......................................................................................... 509