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9.9.2
Register Configuration
Table 9-16 shows the port C register configuration.
Table 9-16 Port C Registers
Name
Abbreviation
R/W
Initial Value
Address*
Port C data direction register
PCDDR
W
H'00
H'FE3B
Port C data register
PCDR
R/W
H'00
H'FF0B
Port C register
PORTC
R
Undefined
H'FFBB
Port C MOS pull-up control register
PCPCR
R/W
H'00
H'FE42
Note: * Lower 16 bits of the address.
(1) Port C Data Direction Register (PCDDR)
7
PC7DDR
0
W
6
PC6DDR
0
W
5
PC5DDR
0
W
4
PC4DDR
0
W
3
PC3DDR
0
W
0
PC0DDR
0
W
2
PC2DDR
0
W
1
PC1DDR
0
W
Bit
:
Initial value :
R/W
:
PCDDR is an 8-bit write-only register, the individual bits of which specify input or output for the
pins of port C. PCDDR cannot be read; if it is, an undefined value will be read.
PCDDR is initialized to H'00 by a power-on reset and in hardware standby mode. It retains its
previous state after a manual reset and in software standby mode. The OPE bit in SBYCR is used
to select whether the address output pins retain their output state or become high-impedance when
a transition is made to software standby mode.
(a)Modes 4 and 5
Port C pins are address outputs regardless of the PCDDR settings.
(b)Mode 6
Setting a PCDDR bit to 1 makes the corresponding port C pin an address output, while clearing
the bit to 0 makes the pin an input port.
(c)Mode 7
Setting a PCDDR bit to 1 makes the corresponding port C pin an output port, while clearing
the bit to 0 makes the pin an input port.