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setting the P1 bit in FLMCR1. The time during which the P1 bit is set is the flash memory
programming time. Set the programming time according to the table in the programming
flowchart.
15.9.2
Program-Verify Mode
In program-verify mode, the data written in program mode is read to check whether it has been
correctly written in the flash memory.
After the elapse of a given programming time, the programming mode is exited (the P1 bit in
FLMCR1 is cleared, then the PSU1 bit is cleared at least t
cp s later). The watchdog timer is
cleared after the elapse of t
cpsu s or more, and the operating mode is switched to program-verify
mode by setting the PV1 bit in FLMCR1. Before reading in program-verify mode, a dummy write
of H'FF data should be made to the addresses to be read. The dummy write should be executed
after the elapse of t
spv s or more. When the flash memory is read in this state (verify data is read
in 16-bit units), the data at the latched address is read. Wait at least t
spvr s after the dummy write
before performing this read operation. Next, the originally written data is compared with the
verify data, and reprogram data is computed (see figure 15-14) and transferred to the reprogram
data area. After 128 bytes of data have been verified, exit program-verify mode, wait for at least
t
cpv s, then clear the SWE1 bit in FLMCR1 to 0. If reprogramming is necessary, set program
mode again, and repeat the program/program-verify sequence as before. However, ensure that the
program/program-verify sequence is not repeated more than (N) times on the same bits.