
752
TIOR1—Timer I/O Control Register 1
H'FF22
TPU1
7
IOB3
0
R/W
6
IOB2
0
R/W
5
IOB1
0
R/W
4
IOB0
0
R/W
3
IOA3
0
R/W
0
IOA0
0
R/W
2
IOA2
0
R/W
1
IOA1
0
R/W
Bit
Initial value
R/W
:
I/O Control A3 to A0
0 output at compare match
1 output at compare match
Toggle output at compare match
0 output at compare match
1 output at compare match
Toggle output at compare match
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
0
1
*: Don’t care
0
1
0
1
0
1
0
1
0
1
*
0
1
0
1
0
1
0
1
0
1
*
Output disabled
Initial output is 0
output
Output disabled
Initial output is 1
output
Capture input source
isTIOCA1 pin
Setting prohibited
TGR1A is
output
compare
register
TGR1A is
input
capture
register
0 output at compare match
1 output at compare match
Toggle output at compare match
0 output at compare match
1 output at compare match
Toggle output at compare match
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
0
1
*: Don’t care
0
1
0
1
0
1
0
1
0
1
*
0
1
0
1
0
1
0
1
0
1
*
Output disabled
Initial output is 0
output
Output disabled
Initial output is 1
output
Capture input source
isTIOCB1 pin
Setting prohibited
TGR1B is
output
compare
register
TGR1B is
input
capture
register
I/O Control B3 to B0