
xxiii
Table 7-4
DMAC Registers.................................................................................................. 168
Table 7-5
Short Address Mode and Full Address Mode
(For 1 Channel: Example of Channel 0) .............................................................. 169
Table 7-6
DMAC Transfer Modes ....................................................................................... 196
Table 7-7
Register Functions in Sequential Mode ............................................................... 198
Table 7-8
Register Functions in Idle Mode.......................................................................... 201
Table 7-9
Register Functions in Repeat Mode ..................................................................... 204
Table 7-10
Register Functions in Normal Mode.................................................................... 208
Table 7-11
Register Functions in Block Transfer Mode........................................................ 211
Table 7-12
DMAC Activation Sources .................................................................................. 217
Table 7-13
DMAC Channel Priority Order............................................................................ 228
Table 7-14
Interrupt Source Priority Order............................................................................ 233
Table 8-1
DTC Registers...................................................................................................... 239
Table 8-2
DTC Functions ..................................................................................................... 248
Table 8-3
Activation Source and DTCER Clearance........................................................... 249
Table 8-4
Interrupt Sources, DTC Vector Addresses, and Corresponding DTCEs ............. 251
Table 8-5
Register Information in Normal Mode ................................................................ 254
Table 8-6
Register Information in Repeat Mode.................................................................. 255
Table 8-7
Register Information in Block Transfer Mode..................................................... 256
Table 8-8
DTC Execution Statuses ...................................................................................... 259
Table 8-9
Number of States Required for Each Execution Status ....................................... 260
Table 9-1
H8S/2214 Port Functions ..................................................................................... 266
Table 9-2
Port 1 Registers .................................................................................................... 270
Table 9-3
Port 1 Pin Functions ............................................................................................. 272
Table 9-4
Port 3 Registers .................................................................................................... 280
Table 9-5
Port 3 Pin Functions ............................................................................................. 285
Table 9-6
Port 4 Registers .................................................................................................... 287
Table 9-7
Port 7 Registers .................................................................................................... 292
Table 9-8
Port 7 Pin Functions ............................................................................................. 295
Table 9-9
Port 9 Registers.................................................................................................... 297
Table 9-10
Port A Registers ................................................................................................... 299
Table 9-11
Port A Pin Functions............................................................................................ 302
Table 9-12
MOS Input Pull-Up States (Port A) ..................................................................... 304
Table 9-13
Port B Registers ................................................................................................... 306
Table 9-14
Port B Pin Functions ............................................................................................ 308
Table 9-15
MOS Input Pull-Up States (Port B) ..................................................................... 312
Table 9-16
Port C Registers ................................................................................................... 314
Table 9-17
MOS Input Pull-Up States (Port C) ..................................................................... 318
Table 9-18
Port D Registers ................................................................................................... 320
Table 9-19
MOS Input Pull-Up States (Port D) ..................................................................... 323
Table 9-20
Port E Registers.................................................................................................... 325
Table 9-21
MOS Input Pull-Up States (Port E)...................................................................... 329
Table 9-22
Port F Registers.................................................................................................... 331