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PRELIMINARY
XRT79L71
80
REV. P2.0.0
1-CHANNEL DS3/E3 CLEAR-CHANNEL FRAMERLIU COMBO - CC/HDLC ARCHITECTURE
1.
In this particular mode, the Transmit Direction circuitry (within the XRT79L71) is dictating the instant that it will
initiate the generation of a new DS3 frame; and is referred to as the "Frame Master". As a consequence, this
particular mode is referred to as the "Frame Master" Mode.
2.
In contrast to "Mode 2" operation, if the XRT79L71 is configured to operate in "Mode 3", then it is NOT imperative
that the "TxFrameRef" input be synchronized to the "TxInClk" input clock signal. In this case, we recommend that
the user tie the "TxFrameRef" input pin to GND.
Finally, the XRT79L71 pulses its TxOH_Ind output pin "High" one bit-period prior to it processing a given
overhead bit within the outbound DS3 frame. Since the TxOH_Ind output pin of the XRT79L71 is electrically
connected to the DS3_Overhead_Ind input pin of the System-Side Terminal Equipment whenever the
XRT79L71 pulses its TxOH_Ind output pin "High", it will also drive the DS3_Overhead_Ind input pin of the
System-Side Terminal Equipment "High". Whenever the System-Side Terminal Equipment detects this pin
toggling "High" it should delay transmission of the very next DS3 payload bit by one TxInClk clock period.
NOTE: If operating the "Transmit Payload Data Input Interface" block in the "Gapped-Clock" Mode; trefer to Section 4.2.1.7. Figure 35 presents an illustration of the System-Side Terminal Equipment/Transmit Payload Data Input
Interface signals for Mode 3 Operation.
Configuring the XRT79L71 to operate in Mode 3 (Serial/Local-Timing/Frame-Master Mode)
The user can configure the XRT79L71 to operate in Mode 3 by executing the following steps.
STEP 1 - Design your board such that the System-Side Terminal Equipment circuitry interfaces to the
Transmit Payload Data Input Interface in the manner as depicted above in Figure 34. STEP 2 - Configure the XRT79L71 to operate in the Serial Mode
This can be accomplished by setting the NibIntf input pin to a logic "Low".
STEP 3 - Configure the XRT79L71 to operate in the Local-Timing/Frame Master Mode
FIGURE 35. AN ILLUSTRATION OF THE BEHAVIOR OF THE SYSTEM-SIDE TERMINAL EQUIPMENT SIGNALS FOR MODE
3 (SERIAL/LOCAL-TIMING/FRAME-MASTER) MODE OPERATION
System-Side Terminal Equipment Signals
DS3_Clock_In
DS3_Data_Out
Tx_Start_of_Frame
DS3_Overhead_Ind
XRT79L71 Transmit Payload Data Input Interface Signals
TxInClk
TxSer
TxFrame
TxOH_Ind
Payload[4702]
Payload[4703]
X-Bit
Payload[1]
Payload[4702]
Payload[4703]
X-Bit
Payload[1]
Note: X-Bit will not be processed by the
Transmit Payload Data Input Interface.
DS3 Frame Number N
DS3 Frame Number N + 1
Note: TxFrame pulses high to denote
DS3 Frame Boundary.
Note: TxOH_Ind pulses high to
denote Overhead Data
(e.g., the X-bit).