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PRELIMINARY
XRT79L71
346
REV. P2.0.0
1-CHANNEL DS3/E3 CLEAR-CHANNEL FRAMERLIU COMBO - CC/HDLC ARCHITECTURE
Conversely, if the "Transmit Line Driver" block is disabled, then set Bit 0 (TxON) within the "LIU Transmit APS/
Redundancy Control" Register to "0" as depicted below.
NOTES:
1.
If this configuration setting is implemented, then the TTIP and TRING output pins (of the XRT79L71) will be tri-
stated.
2.
In order to control the "ON/OFF" state of the Transmit Line Driver (within the XRT79L71), via software command
the user MUST make sure that the "TxON" input pin (Ball R15) is pulled to a logic "high".
3.
If the user intends to implement the XRT79L71 into a "E3 Redundancy" design, then executing a write to this
particular register, (either enabling or disabling the Transmit Output) will be required.
5.2.5.6
The Transmit Drive Monitor Block
The Transmit Drive Monitor block permits the user to monitor the "Transmit Output" signal, for continuous
bipolar signal activity, and can be used to (perhaps) detect a fault condition, in the "Transmit Output" line.
Use of the Transmit Drive Monitor block is optional. However, if this feature is used, there are two ways that
this feature can be implemented.
Externally, and
Internally
5.2.5.6.1
Implementing the Transmit Drive Monitor via "External" Means
To implement "Transmit Drive Monitoring" via "External Means, then this means that the Transmit Drive
Monitor block will be monitoring (e.g., checking for bipolar activity) within the "Transmit Output" line signal via
the "MTIP" and "MRING" input pins.
If the "Transmit Drive Monitoring" via "External Means" is to be
implemented, then the following steps must be executed.
STEP 1 - Design the Hardware such that (1) the "MTIP" ball is connected to the "TTIP" signal through a
274W resistor, connected in series, and (2) that the "MRING" ball is electrically connected to the
"TRING" signal through a 274W resistor, connected in series.
These connections are also depicted in the Schematic design below in Figure 160,
LIU Transmit APS/Redundancy Control Register (Address = 0x1300)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Unused
TxON
R/O
R/W
0
FIGURE 160. A SCHEMATIC DESIGN, DEPICTING THE REQUIRED CONNECTIONS FOR "EXTERNAL" TRANSMIT DRIVE
MONITORING
R1 274
J2
BNC
1
2
R7 31.6
R2 274
U2
XRT79L71
T11
T10
P10
P11
TTIP
TRING
MTIP
MRING
R8 31.6
T2
T3001
1
6
3
4