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PRELIMINARY
XRT79L71
522
REV. P2.0.0
1-CHANNEL DS3/E3 CLEAR-CHANNEL FRAMERLIU COMBO - CC/HDLC ARCHITECTURE
Generating the Change in LOF Defect Condition Interrupt
The Receive E3 Framer block will indicate that it is declaring the Change in LOF Defect Condition Interrupt by
doing all of the following.
a. Asserting the Interrupt Request output pin (INT*), by pulling it "Low".
b. Setting Bit 2 (Change in LOF Defect Condition Interrupt Status), within the Receive E3 Interrupt Status
Register # 1 as depicted below.
6.3.2.2
THE FRAME-MAINTENANCE MODE - THE OOF AND LOF DEFECT DECLARATION
CRITERIA
Once the Receive E3 Framer block has entered the In-Frame state, then it is considered to be operating in the
Frame Maintenance Mode. As the Receive E3 Framer block transitions into the In-Frame State, it will notify
the Microprocessor/Microcontroller of this fact by doing all of the following.
Clearing the OOF (Out-of-Frame) and LOF (Loss of Frame) Defect Conditions.
The Receive E3 Framer block will indicate that it is clearing both the OOF and LOF Defect Conditions by
setting Bits 5 (OOF Defect Declared) and 6 (LOF Defect Declared) within the Receive E3 Configuration and
Status Register # 2 to "0" as depicted below.
Generating the Change in OOF Defect Condition and Change in LOF Defect Condition Interrupts
The Receive E3 Framer block will indicate that it is generating the Change in OOF Defect Condition and the
Change in LOF Defect Condition Interrupts, by doing all of the following.
Receive E3 Configuration and Status Register # 2 - G.832 (Direct Address = 0x1111)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Receive LOF
Algo
LOF Defect
Declared
OOF Defect
Declared
LOS Defect
Declared
AIS Defect
Declared
RxPLD
Unstab
RxTMark
FERF Defect
Declared
R/W
R/O
0
1
0
Receive E3 Interrupt Status Register # 1 - G.832 (Direct Address = 0x1114)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Unused
Change in
SSM MSG
Interrupt
Status
Change in
SSM OOS
Interrupt
Status
COFA
Interrupt
Status
Change in
OOF Defect
Condition
Interrupt
Status
Change in
LOF Defect
Condition
Interrupt
Status
Change in
LOS Defect
Condition
Interrupt
Status
Change in
AIS Defect
Condition
Interrupt
Status
R/O
RUR
0
1
0
Receive E3 Configuration and Status Register # 2 - G.832 (Direct Address = 0x1111)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Receive LOF
Algo
LOF Defect
Declared
OOF Defect
Declared
LOS Defect
Declared
AIS Defect
Declared
RxPLD
Unstab
RxTMark
FERF Defect
Declared
R/W
R/O
0