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XRT79L71
PRELIMINARY
481
1-CHANNEL DS3/E3 CLEAR-CHANNEL FRAMERLIU COMBO - CC/HDLC ARCHITECTURE
REV. P2.0.0
b. It will compute and append the Frame Check Sequence (FCS) value, to the back end of the outbound
PMDL Message.
c. It will begin (in a bit-by-bit manner) inserting the resulting PMDL Message into the N bit-fields , within the
outbound E3 frames.
NOTES:
1.
After the user has set the Initiate Transmission of LAPD/PMDL Message bit to "1", the user is advised (at some
later time) to execute another write operation to this register that sets the Initiate Transmission of LAPD/PMDL
Message bit back to "0".
2.
Once the Transmit LAPD Controller has started to transmit the PMDL Message to the remote terminal, it will
denote this by setting the Transmit LAPD Controller Busy bit-field within the Transmit E3 LAPD Status/Interrupt
register to "1", as illustrated below.
This bit-field permits the user to poll the status of the Transmit LAPD Controller. Once the Transmit LAPD
Controller has completed the transmission of the LAPD Message frame, this bit-field will then toggle back to
"0".
6.2.3.2
Transmitting Non-Standard Variable Length (e.g., up to 82 bytes) LAPD Messages
The user can (1) write the contents of the outbound PMDL Message into the Transmit LAPD Message buffer
and (2) command the Transmit LAPD Controller to begin the transmission of this PMDL Message by executing
the following steps.
STEP 1 - Make sure that the XRT79L71 has been configured to operate in the E3, ITU-T G.832 Framing
format.
This is accomplished by reading out the contents of the Frame Operating Mode Register (Address = 0x1100)
and verifying that Bit 6 (DS3/E3*) is set to "0" and that Bit 2 (Frame Format) is set to "1" as illustrated below.
STEP 2 - Select either the NR or GC byte as the LAPD Channel
The user can accomplish this by setting Bit 4 The user can accomplish this by writing the appropriate value into
Bit 4 (Transmit LAPD in NR Byte), within the "Transmit E3 Configuration" Register, as depicted below.
Transmit E3 LAPD Status/Interrupt Register (Address = 0x1134)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Unused
Initiate Transmis-
sion of LAPD/PMDL
Message
Transmit LAPD
Controller Busy
TransmitLAPD
Interrupt Enable
Transmit LAPD
Interrupt Status
RO
R/W
RUR
0
1
0
Framer Operating Mode Register (Address = 0x1100)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Local
Loop-back
DS3/E3*
Internal LOS
Enable
RESET
Direct
Mapped
ATM
Frame
Format
Timing Reference Select
[1:0]
R/W
X
0
X
0
X
1
X