![](http://datasheet.mmic.net.cn/Exar-Corporation/XRT79L71IB-F_datasheet_100145/XRT79L71IB-F_149.png)
PRELIMINARY
XRT79L71
134
REV. P2.0.0
1-CHANNEL DS3/E3 CLEAR-CHANNEL FRAMERLIU COMBO - CC/HDLC ARCHITECTURE
The purpose of the Transmit DS3 Framer block is to accept data from the Transmit Payload Data Input
Interface block, the Transmit LAPD Controller and the Transmit FEAC Processor blocks, and to create and
transmit a DS3 data stream. Afterwards, the Transmit DS3 Framer block will route this DS3 data-stream to the
Transmit DS3 LIU Block for transmission to the remote terminal equipment. The Transmit DS3 Framer block
also supports the following functions.
Transmitting the LOS Pattern (under Software control)
Transmitting the AIS Pattern (under Software control)
Transmitting the Idle Pattern (under Software control)
Transmitting the FERF (RDI) indicator (automatically and under software control)
Forcing the X Bits to "1" (under Software control)
ransmitting the FEBE indicator (automatically and under Software control).
4.2.5.1
TRANSMITTING THE LOS PATTERN
The XRT79L71Transmit DS3/E3 Framer block permits the user to transmit the LOS (Loss of Signal) pattern to
the remote terminal equipment. The Transmit DS3/E3 Framer block provides the user with two options when
transmitting the LOS pattern.
Transmitting an All Zeros pattern
Transmitting an All Ones pattern
FIGURE 58. ILLUSTRATION OF THE FUNCTIONAL BLOCK DIAGRAM OF THE TRANSMIT DIRECTION CIRCUITRY, WHEN-
EVER THE
XRT79L71 HAS BEEN CONFIGURED TO OPERATE IN THE DS3 CLEAR-CHANNEL FRAMER MODE (WITH THE
TRANSMIT DS3/E3 FRAMER BLOCK HIGHLIGHTED)
Transmit
Payload Data
Input
Interface
Block
Transmit
Payload Data
Input
Interface
Block
Transmit
DS3/E3
Framer
Block
Transmit
DS3/E3
Framer
Block
Tranmit
DS3/E3
LIU Block
Tranmit
DS3/E3
LIU Block
TxSer
TxNib[3:0]
TxInClk
TRING
TTIP
Transmit
Overhead Data
Input Interface
Block
Transmit
Overhead Data
Input Interface
Block
TxOHClk
TxOHIns
TxOHInd
TxOH
TxOHEnable
TxOHFrame
TxNibClk
TxFrame
Tx LAPD
Controller
Block
Tx LAPD
Controller
Block
From Microprocessor
Interface Block
Tx LAPD
Buffer
(90 Bytes)
Tx LAPD
Buffer
(90 Bytes)
Tx FEAC
Processor
Block
Tx FEAC
Processor
Block