![](http://datasheet.mmic.net.cn/Exar-Corporation/XRT79L71IB-F_datasheet_100145/XRT79L71IB-F_34.png)
XRT79L71
PRELIMINARY
19
1-CHANNEL DS3/E3 CLEAR-CHANNEL FRAMERLIU COMBO - CC/HDLC ARCHITECTURE
REV. P2.0.0
The Receive UTOPIA Interface block can be configured to operate with either an 8 or 16-bit wide Receive
UTOPIA Data bus.
NOTE: The Receive UTOPIA Interface block supports UTOPIA Level 3 from a signaling stand-point. The Receive UTOPIA
Interface block (within the XRT79L71) still only supports a 16-bit wide (not 32-bit wide) UTOPIA Bus and only
operates up to 50MHz (not 100MHz).
1.3.20
A more detailed Functional/Architectural Description of the XRT79L71, when configured to
operate in the ATM UNI Mode, can be found in the document (79L71_Arch_Descr_ATM.pdf).
(Architectural/Functional Description of the XRT79L71 1-Channel DS3/E3 ATM UNI/PPP/Clear-Channel
Framer with LIU IC - ATM UNI Mode Applications).
1.4
FUNCTIONAL ARCHITECTURE/DESCRIPTION OF THE XRT79L71 - PPP OVER DS3/E3 MODE
If the XRT79L71 has been configured to operate in the PPP over DS3/E3 Mode, then it will have the Functional
Architecture as is presented below in Figure 5.
Figure 5 indicates that the XRT79L71 consists of the following functional blocks.
The Transmit POS-PHY Interface block
The Transmit Overhead Data Input Interface block
The Transmit PPP Packet Processor Block
The Transmit FEAC Controller Block (DS3, C-bit Parity Applications Only)
The Transmit Trail-Trace Message Controller Block (E3, ITU-T G.832 Applications Only)
The Transmit SSM Controller Block (E3, ITU-T G.832 Applications Only)
The Transmit LAPD Controller Block
The Transmit DS3/E3 Framer Block
The Transmit DS3/E3 LIU Block
he Receive DS3/E3 LIU Block
FIGURE 5. THE FUNCTIONAL BLOCK DIAGRAM OF THE XRT79L71 WHEN IT HAS BEEN CONFIGURED TO OPERATE IN
THE
PPP OVER DS3/E3 MODE
Tx
POS-PHY
Interface
Block
Tx
POS-PHY
Interface
Block
Rx
POS-PHY
Interface
Block
Rx
POS-PHY
Interface
Block
Tx PPP
Packet
Processor
Block
Tx PPP
Packet
Processor
Block
Rx PPP
Packet
Processor
Block
Rx PPP
Packet
Processor
Block
Rx DS3/E3
Framer
Block
Rx DS3/E3
Framer
Block
Tx DS3/E3
Framer
Block
Tx DS3/E3
Framer
Block
Rx DS3/E3
LIU
Block
Rx DS3/E3
LIU
Block
Tx DS3/E3
LIU
Block
Tx DS3/E3
LIU
Block
DS3/E3
Jitter
Attenuator
Block
DS3/E3
Jitter
Attenuator
Block
DS3/E3
Jitter
Attenuator
Block
DS3/E3
Jitter
Attenuator
Block
Only one JA exists.
Can be configured in
Tx or Rx Path