PRELIMINARY
XRT79L71
94
REV. P2.0.0
1-CHANNEL DS3/E3 CLEAR-CHANNEL FRAMERLIU COMBO - CC/HDLC ARCHITECTURE
T
However, the Transmitter Section of the XRT79L71 can also be configured to externally accept values via a
certain input port and to insert this data into certain select overhead bits, within the outbound DS3 data-stream.
In this case, these "externally inserted" values for these overhead bits will overwrite that which has been
internally generated by the Transmit DS3/E3 Framer block. The XRT79L71 permits the user to implement this
overhead bit insertion by either of the following two methods.
By configuring the Transmit Section of the XRT79L71 to accept DS3 overhead data via the Transmit
By configuring the Transmit Section of the XRT79L71 to accept DS3 overhead data via the Transmit Payload
Data Input Interface block.
Configuring the Transmit Section of the XRT79L71 to Accept DS3 Overhead Bits via the Transmit
Payload Input Interface
This section describes how one can configure the XRT79L71 to do the following.
1.
To accept a DS3 data-stream that consists of both payload data and some DS3 overhead bits, and
2.
To configure the Transmit Section of the XRT79L71 to accept a user specified set of overhead bits from
the Transmit Payload Data Input Interface block and insert these overhead bits into the outbound DS3
data-stream, without modification.
For DS3 applications, this insertion of overhead data can be performed for all DS3 overhead bits, with the
exception of the P, F and M bits. The Transmit DS3 Framer block will unconditionally internally generate these
particular overhead bits.
The procedure for configuring the Transmit Framer block to externally accept and insert DS3 Overhead data
Via the Transmit Payload Data Input Interface and insert this data into the specified overhead bit position is
presented below.
STEP 1 - Set Bit 7 (TxOHSrc), within the Test Register to "1", as depicted below.
TABLE 16: HOW THE TRANSMIT DS3 FRAMER BLOCK INTERNALLY GENERATES EACH OF THE OVERHEAD BITS - M13/
M23 APPLICATIONS
BIT NAME
BIT DESCRIPTION
HOW OVERHEAD BIT IS INTERNALLY GENERATED BY THE TRANSMIT DS3
FRAMER BLOCK
X-Bits (2)
FERF/Yellow Alarm Indicator
Bits
Either Software Controlled or automatically set to "0" whenever the cor-
responding Receive DS3 Framer block declares the LOS, LOF/OOF or
AIS defect condition.
F1 Bits (14)
F-Frame Framing Alignment
bits that are of the value "1"
Set to the value of "1".
F0 Bits (14)
F-Frame Framing Alignment
bits that are of the value "0"
Set to the value of "0".
M1 Bit (1)
M-Frame Framing Alignment
bits that are of the value "1".
Set to the value of "1".
M0 Bit (2)
M-Frame Framing Alignment
bits that are of the value "0".
Set to the value of "0".
P-bits (2)
Parity Bits
Transmit DS3 Framer block computes the even parity value over the
payload bits within a given DS3 frame. The results of this calculation are
inserted into the two P-bit positions within the very next DS3 frame.
C-bits (21)
DS2 to DS3 Multiplexing Stuff
Indicator bits
Set to the value of "0".