
XRT79L71
PRELIMINARY
591
1-CHANNEL DS3/E3 CLEAR-CHANNEL FRAMERLIU COMBO - CC/HDLC ARCHITECTURE
REV. P2.0.0
Bit 4 (RxPRBS Lock), within the "Test Register" with Bit 4 (OOF Defect Condition Declared), within the "Receive
DS3 Configuration and Status" Register, as depicted below.
Similarly, for E3 Applications, one will need to validate Bit 4 (RxPRBS Lock) within the "Test Register" with Bits
5 (OOF Defect Condition Declared) and 6 (LOF Defect Condition Declared) within the "Receive E3
Configuration and Status Register # 2" registers, as depicted below for ITU-T G.751 and G.832, respectively.
7.2.3
Checking for PRBS Bit Errors
The XRT 79L71 permits one to check for any occurrence of PRBS Bits errors, for the duration that the PRBS
Pattern Receiver is enabled. To determine if (and how many) PRBS errors have occurred during a certain
period of time, read out the contents of the "PRBS Error Count" Registers. The address locations and bit-fields
of these register is depicted below.
Receive DS3 Configuration and Status Register (Address = 0x1110)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
AIS Defect
Condition
Declared
LOS Defect
Condition
Declared
DS3 Idle
Condition
Declared
OOF Defect
Condition
Declared
Unused
Framing
with
Valid P-Bits
F-Sync
Algo
M-Sync
Algo
R/O
R/W
0
X
0
1
0
Receive E3 Configuration and Status Register # 2 - G.751 (Address = 0x1111)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
RxLOF
Algo
LOF Defect
Condition
Declared
OOF Defect
Condition
Declared
LOS Defect
Condition
Declared
AIS Defect
Condition
Declared
Unused
FERF/RDI
Defect Con-
dition
Declared
R/W
R/O
0
X
0
1
Receive E3 Configuration and Status Register # 2 - G.832 (Address = 0x1111)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
RxLOF
Algo
LOF Defect
Condition
Declared
OOF Defect
Condition
Declared
LOS Defect
Condition
Declared
AIS Defect
Condition
Declared
RxPLD
Unstab
RxT Mark
FERF/RDI
Defect Con-
dition
Declared
R/W
R/O
0
X
0
1
PRBS Error Count Register - MSB (Address = 0x1168)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
PRBS_Error_Count_Upper_Byte[7:0]
RUR
0