![](http://datasheet.mmic.net.cn/Exar-Corporation/XRT79L71IB-F_datasheet_100145/XRT79L71IB-F_555.png)
PRELIMINARY
XRT79L71
540
REV. P2.0.0
1-CHANNEL DS3/E3 CLEAR-CHANNEL FRAMERLIU COMBO - CC/HDLC ARCHITECTURE
6.3.4.1
AN INTRODUCTION TO SSM (SYNCHRONIZATION STATUS MESSAGES)
If the XRT79L71 is operating in the E3, ITU-T G.832 Frame Format, then Bits 6, 7 and 8 (the three least
significant bit-fields) within the MA byte can be used to transport the Synchronization Status Message (referred
to as "SSM" from this point on) from one terminal equipment to another. The bit-format of the MA byte, with
these bit-fields shaded is presented below.
According to ITU-T G.707, the SSM is a four-bit value that is used to identify the quality-level of the
synchronization/timing that the "Transmitting" E3 Terminal Equipment is currently operating at.
Whenever a given "Transmitting" E3 Terminal transmits the SSM to the remote terminal, it does so by
repeatedly transmitting this four-bit SSM message, one bit at a time (or one bit per E3 frame period) via Bit 8
(the least significant bit-field) within the MA byte. As this "Transmitting" E3 Terminal repeatedly transmits this
byte (to the remote terminal equipment) it will use Bits 6 and 7 (within the MA Byte) to indiciate which SSM
Message bit is being transported via Bit 8, within the current MA byte. Depending upon which of the four bits
(within the SSM) that is being transported via the MA byte, within a given E3 frame, the "Transmitting" E3
FIGURE 251. ILLUSTRATION OF THE FUNCTIONAL BLOCK DIAGRAM OF THE RECEIVE DIRECTION CIRCUITRY, WHEN-
EVER THE
XRT79L71 HAS BEEN CONFIGURED TO OPERATE IN THE E3, ITU-T G.832 CLEAR-CHANNEL FRAMER
MODE (WITH THE RECEIVE SSM CONTROLLER BLOCK HIGHLIGHTED)
FIGURE 252. THE BIT-FORMAT OF THE MA-BYTE WITHIN THE E3, ITU-T G.832 FRAMING FORMAT
BIT 1
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
BIT 8
FERF/RDI
FEBE/REI
Payload_Type[2:0]
SSM Multi-Frame Indica-
tor[1:0]
SSM Bit
Receive
Payload Data
Input
Interface
Block
Receive
Payload Data
Input
Interface
Block
Receive
DS3/E3
Framer
Block
Receive
DS3/E3
Framer
Block
Receive
DS3/E3
LIU Block
Receive
DS3/E3
LIU Block
RxSer
RxNib[3:0]
RxClk
RRING
RTIP
Receive
Overhead Data
Input Interface
Block
Receive
Overhead Data
Input Interface
Block
RxOHClk
RxOHInd
RxOH
RxOHEnable
RxOHFrame
RxNibClk
RxFrame
Rx LAPD
Controller
Block
Rx LAPD
Controller
Block
From Microprocessor
Interface Block
Rx LAPD
Buffer
(90 Bytes)
Rx LAPD
Buffer
(90 Bytes)
Rx TTM
Controller
Block
Rx TTM
Controller
Block
Rx SSM
Controller
Block
Rx SSM
Controller
Block