
OHCI Controller Programming Model
146
September 2005
SCPS110
7.20 Power Management Control and Status Register
The power management control and status register implements the control and status of the PCI
power-management function. This register is not affected by the internally generated reset caused by the
transition from the D3hot to D0 state. See Table 717 for a complete description of the register contents.
Function 1 register offset: 48h
Register type:
Read/Clear, Read/Write, Read-only
Default value:
0000h
BIT NUMBER
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
RESET STATE
0
Table 717. Power Management Control and Status Register Description
BIT
FIELD NAME
TYPE
DESCRIPTION
15
PME_STS
RWC
Bit 15 is set to 1b when the controller normally asserts the PME signal independent of the state of bit 8
(PME_ENB). This bit is cleared by a writeback of 1b, which also clears the PME signal driven by the
controller. Writing 0b to this bit has no effect.
1413
DATA_SCALE
R
This field returns 00b, because the data register is not implemented.
129
DATA_SELECT
R
This field returns 0h, because the data register is not implemented.
8
PME_ENB
RW
When bit 8 is set to 1b, PME assertion is enabled. When bit 8 is cleared, PME assertion is disabled.
This bit defaults to 0b if the function does not support PME generation from D3cold. If the function
supports PME from D3cold, then this bit is sticky and must be explicitly cleared by the operating system
each time it is initially loaded.
72
RSVD
R
Reserved. Bits 72 return 00 0000b when read.
10
PWR_STATE
RW
Power state. This 2-bit field sets the controller power state and is encoded as follows:
00 = Current power state is D0.
01 = Current power state is D1.
10 = Current power state is D2.
11 = Current power state is D3.
These bits are cleared only by the assertion of GRST.
7.21 Power Management Extension Registers
The power management extension register provides extended power-management features not applicable
to the controller; thus, it is read-only and returns 0000h when read. See Table 718 for a complete description
of the register contents.
Function 1 register offset: 4Ah
Register type:
Read-only
Default value:
0000h
BIT NUMBER
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
RESET STATE
0
Table 718. Power Management Extension Registers Description
BIT
FIELD NAME
TYPE
DESCRIPTION
150
RSVD
R
Reserved. Bits 150 return 0000h when read.