
Principles of Operation
58
September 2005
SCPS110
Table 39. EEPROM Loading Map (Continued)
SERIAL ROM
OFFSET
BYTE DESCRIPTION
4Eh
Reserved (PCI A0h, slot 3 3.3 V maximum current)
4Fh
Reserved (PCI A4h, slot 4 3.3 V maximum current)
50h
Reserved (PCI A8h, slot 5 3.3 V maximum current)
51h
PCI Smart Card function indicator (04h)
52h
Number of bytes (0Eh)
53h
PCI 09h, class code, byte 0
54h
PCI 0Ah, class code, byte 1
55h
PCI 0Bh, class code, byte 2
56h
PCI 2Ch, subsystem vendor ID, byte 0
57h
PCI 2Dh, subsystem vendor ID, byte 1
58h
PCI 2Eh, subsystem ID, byte 0
59h
PCI 2Fh, subsystem ID, byte 1
5Ah
PCI 4Ch, general control bits 74
5Bh
PCI 58h, Smart Card configuration 1, byte 0, bits 4, 0
5Ch
PCI 59h, Smart Card configuration 1, byte 1, bits 4, 0
5Dh
PCI 5Ah, Smart Card configuration 1, byte 2, bits 4, 0
5Eh
PCI 5Bh, Smart Card configuration 1, byte 3, bits 74, 0
5Fh
PCI 5Ch, Smart Card configuration 2, byte 0
60h
PCI 5Dh, Smart Card configuration 2, byte 1
61h
End-of-list indicator (80h)
3.7
Programmable Interrupt Subsystem
Interrupts provide a way for I/O devices to let the microprocessor know that they require servicing. The
dynamic nature of PC Cards and the abundance of PC Card I/O applications require substantial interrupt
support from the PCIxx12 controller. The controller provides several interrupt signaling schemes to
accommodate the needs of a variety of platforms. The different mechanisms for dealing with interrupts in this
controller are based on various specifications and industry standards. The ExCA register set provides interrupt
control for some 16-bit PC Card functions, and the CardBus socket register set provides interrupt control for
the CardBus PC Card functions. The controller is, therefore, backward compatible with existing interrupt
control register definitions, and new registers have been defined where required.
The controller detects PC Card interrupts and events at the PC Card interface and notifies the host controller
using one of several interrupt signaling protocols. To simplify the discussion of interrupts in the controller, PC
Card interrupts are classified either as card status change (CSC) or as functional interrupts.
The method by which any type of interrupt is communicated to the host interrupt controller varies from system
to system. The controller offers system designers the choice of using parallel PCI interrupt signaling, parallel
ISA-type IRQ interrupt signaling, or the IRQSER serialized ISA and/or PCI interrupt protocol. It is possible to
use the parallel PCI interrupts in combination with either parallel IRQs or serialized IRQs, as detailed in the
sections that follow. All interrupt signaling is provided through the seven multifunction terminals,
MFUNC0MFUNC6.
3.7.1 PC Card Functional and Card Status Change Interrupts
PC Card functional interrupts are defined as requests from a PC Card application for interrupt service and are
indicated by asserting specially-defined signals on the PC Card interface. Functional interrupts are generated
by 16-bit I/O PC Cards and by CardBus PC Cards.