
Principles of Operation
71
September 2005
SCPS110
Link control register (OHCI offset E0h/E4h, see Section 8.31): bit 6
Link enhancement control set/clear register (TI Extension offset A88/A8Ch, see Section 9.4): bits 1512,
10, 8, 7, 2, 1
The global reset-only (function 2) register bits:
Subsystem vendor ID register (PCI offset 2Ch, see Section 11.9): bits 15–0
Subsystem ID register (PCI offset 2Eh, see Section 11.10): bits 15–0
Power-management control and status register (PCI offset 48h, see Section 11.18): bits 15, 8, 1, 0
General control register (PCI offset 4Ch, see Section 11.21): bits 74, 2–0
Subsystem access register (PCI offset 50h, see Section 11.22): bits 310
Diagnostic register (PCI offset 54h, see Section 11.23): bits 31–0
The global reset-only (function 3) register bits:
Subsystem vendor ID register (PCI offset 2Ch, see Section 12.9): bits 15–0
Subsystem ID register (PCI offset 2Eh, see Section 12.10): bits 15–0
Power-management control and status register (PCI offset 84h, see Section 12.19): bits 15, 8, 1, 0
General control register (PCI offset 88h, see Section 12.22): bits 63, 0
Subsystem access register (PCI offset 8Ch, see Section 12.23): bits 310
Diagnostic register (PCI offset 90h, see Section 12.24): bits 31–0
Slot 0 max current register (PCI offset 94h, see Section 12.25): bits 70
The global reset-only (function 4) register bits:
Subsystem vendor ID register (PCI offset 2Ch, see Section 13.10): bits 15–0
Subsystem ID register (PCI offset 2Eh, see Section 13.11): bits 15–0
Power-management control and status register (PCI offset 48h, see Section 13.19): bits 15, 8, 1, 0
General control register (PCI offset 4Ch, see Section 13.22): bits 74, 0
Subsystem ID alias register (PCI offset 50h, see Section 13.23): bits 310
Class code alias register (PCI offset 54h, see Section 13.24): bits 310
Smart card configuration 1 register (PCI offset 58h, see Section 13.25): bits 310
Smart card configuration 2 register (PCI offset 5Ch, see Section 13.26): bits 310