
OHCI Registers
177
September 2005
SCPS110
8.32 Node Identification Register
The node identification register contains the address of the node on which the OHCI-Lynx
chip resides, and
indicates the valid node number status. The 16-bit combination of the busNumber field (bits 156) and the
NodeNumber field (bits 50) is referred to as the node ID. See Table 824 for a complete description of the
register contents.
OHCI register offset:
E8h
Register type:
Read/Write/Update, Read/Update, Read-only
Default value:
0000 FFXXh
BIT NUMBER
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
RESET STATE
0
BIT NUMBER
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
RESET STATE
1
X
Table 824. Node Identification Register Description
BIT
FIELD NAME
TYPE
DESCRIPTION
31
iDValid
RU
Bit 31 indicates whether or not the controller has a valid node number. It is cleared when a 1394 bus
reset is detected and set to 1b when the controller receives a new node number from its PHY layer.
30
root
RU
Bit 30 is set to 1b during the bus reset process if the attached PHY layer is root.
2928
RSVD
R
Reserved. Bits 29 and 28 return 00b when read.
27
CPS
RU
Bit 27 is set to 1b if the PHY layer is reporting that cable power status is OK.
2616
RSVD
R
Reserved. Bits 2616 return 0s when read.
156
busNumber
RWU
This field identifies the specific 1394 bus the controller belongs to when multiple 1394-compatible
buses are connected via a bridge. The default value for this field is 11 1111 1111b.
50
NodeNumber
RU
This field is the physical node number established by the PHY layer during self-identification. It is
automatically set to the value received from the PHY layer after the self-identification phase. If the PHY
layer sets the nodeNumber to 63, then software must not set bit 15 (run) in the asynchronous context
control register (see Section 8.40) for either of the AT DMA contexts.