
8. Clock Generation Circuits
Figure 8.7
PM2 Register
b7 b6 b5 b4
b1
b2
b3
Processor Mode Register 2(1)
Symbol
PM2
Address
0013h
Bit Symbol
Bit Name
RW
(b0)
After Reset
00h
RW
NOTES:
1. Set the PM2 register after the PRC1 bit in the PRCR register is set to 1 (write enable).
2. Once bits PM22 and PM21 are set to 1, they cannot be set to 0 by program.
3. When the PM21 bit is set to 1,
the CPU clock does not stop running even if the WAIT instruction is executed;
writes to the following bits have no effect.
- the CM02 bit in the CM0 register
- the CM05 bit in the CM0 register (the main clock does not stop)
- the CM07 bit in the CM0 register (CPU clock source is not changed)
- the CM10 bit in the CM1 register (the MCU does not enter stop mode)
- the CM17 bit in the CM1 register (CPU clock source is not changed)
- the CM20 bit in the CM2 register (oscillation stop detect function is not changed)
- all bits in registers PLC0 and PLC1 (PLL frequency synthesizer function is not changed)
4. When the PM22 bit is set to 1,
the on-chip oscillator clock becomes the count source for the watchdog timer after the on-chip oscillator starts;
write to the CM10 bit in the CM1 register is disabled (writing a 1 has no effect and the MCU does not enter stop mode);
the watchdog timer keeps running when the MCU is in wait mode.
b0
Function
b7 b6
0 0: Clock selected by the PM35 bit in the PM3
register
0 1: XIN clock (fXIND)
1 0: On-chip oscillator clock (fROC)
1 1: Do not set to this value
Reserved bit
PM21
PM22
System clock protect bit(2, 3)
0: Protects a clock by the PRCR register
1: Disables a clock change
WDT count source protect bit(2,4)
Set to 0
0: Selects BCLK as count source for the
watchdog timer
1: Selects the on-chip oscillator clock as count
source for the watchdog timer
PM26
f2n count source select bits
PM27
RW
Reserved bits
Set to 0
0
RW
(b5-b3)