
24. Programmable I/O Ports
24. Programmable I/O Ports
87 programmable I/O ports, P0 to P10 (excluding P8_5), are available in the 100-pin package and 123 programmable
I/O ports, P0 to P15 (excluding P8_5), are in the 144-pin package. The Port Pi Direction Registers determine
individual port status, input or output. The pull-up control registers determine whether the ports, divided into groups of
four, are pulled up or not. P8_5 is an input port and cannot be pulled internally. The P8_5 bit in the P8 register
indicates an NMI input level since P8_5 shares its pin with NMI.
Figures
24.1 to
24.4 show programmable I/O port configurations.
Each pin functions as a programmable I/O port or an I/O pin for internal peripheral functions.
To use as I/O pins for internal peripheral functions, refer to the description for individual functions.
Registers associated with the programmable I/O ports are as follows.
24.1
Port Pi Direction Register (PDi Register, i = 0 to 15)
The PDi register configures a programmable I/O port as either input or output. Each bit in the PDi register
corresponds to one port.
No bit controlling P8_5 is provided in the PDi register.
24.2
Port Pi Register (Pi Register, i = 0 to 15)
The MCU communicates with external devices by reading and writing to the Pi register. The Pi register consists of
a port latch to hold output data and a circuit to read pin levels. Each bit in the Pi register corresponds to one port.
24.3
Function Select Register A (PSj Register, j = 0 to 3, 5, 8 to 11)
Figures
24.7 to
24.11 show the PSj registers.
The PSj register selects either I/O port or peripheral function output if an I/O port shares its pin with a peripheral
function output (excluding DA0 and DA1).
When multiple peripheral function outputs are assigned to the same pin, set registers PSL0 to PSL3, PSL5, PSL9 to
PSL11, PSC to PSC3, PSC9, PSD1, PSD2, and PSE1 to select which function to use.
Tables
24.2 to
24.11 list peripheral function output control settings for each pin.