
23. 32-Slot CAN Module
When using the CAN interrupt, the C2SISTR register indicates which message slot has requested an interrupt.
The SISi bit (i = 0 to 31) is not automatically set to 0 (interrupt not requested) even if the interrupt is
acknowledged. Set the SISi bit to 0 by program.
Use the MOV instruction to set the SISi bits to 0. Write a 0 to the bit which is to set to 0, and write a 1 to the bit
which is to remain unchanged.
For example: To set the SIS0 bit in CAN2 to 0
mov.l #07FFFFFFFh, C2SISTR
23.1.12.1 Message Slot for Transmit Operation
The SISi bit becomes 1 (interrupt requested) when the value of the C2TSR register is stored into the message
slot i after a transmit operation is completed.
23.1.12.2 Message Slot for Receive Operation
The SISi bit becomes 1 (interrupt requested) when the receive message is stored in the message slot i after a
receive operation is completed.
NOTES:
1. If the RSPLOCK bit in registers C2MCTL0 to C2MCTL31 is set to 0 (automatic answering to the remote
frame enabled), the SISi bit becomes 1 when the remote frame receive operation is completed and the
following data frame transmit operation is completed.
2. In the remote frame transmit message slot, the SISi bit becomes 1 both when the remote frame transmit
operation is completed and when the data frame receive operation is completed.
3. The SISi bit becomes 1, if an interrupt request is generated and also a 0 is written by program
simultaneously.
4. Regardless of whether the SIMi bit in the C2SIMKR register is set to 0 (interrupt request masked) or to 1
(interrupt request enabled), the SISi bit becomes 1 at the completion of the transmit operation or at the
completion of the receive operation.