
15. Three-Phase Motor Control Timer Function
15. Three-Phase Motor Control Timer Function
Three-phase motor driving waveform can be output by using timers A1, A2, A4 and B2.
Table 15.1 lists specifications
of the three-phase motor control timer functions.
Table 15.2 lists pin settings. Figure 16.1 shows a block diagram.
Figures
15.2 to 15.10 show registers associated with the three-phase motor control timer function.
Table 15.1
Specifications of Three-Phase Motor Control Timer Functions
NOTES:
1. Forced cutoff by input to the NMI pin is enabled when the INV02 bit in the INVC0 register is set to 1 (three-
phase motor control timer function) and the INV03 bit is set to 1 (three-phase motor control timer output
enabled).
2. Bits CNT3 to CNT0 in the TCSPR register select no division (n = 0) or divide-by-2n (n = 1 to 15).
Item
Specification
Three-phase waveform output
pins
6 pins (U, U, V, V, W, W)
Apply a low-level (“L”) signal to the NMI pin, and U, U, V, V, W, and W are placed
in high-impedance states
Timers to be used
Timers A4, A1, and A2 (used in one-shot timer mode):
Timer A4: U-, U-phase waveform control
Timer A1: V-, V-phase waveform control
Timer A2: W-, W-phase waveform control
Timer B2 (used in timer mode)
Carrier wave cycle control
Dead time timer (three 8-bit timers share the reload register):
Dead time control
Output waveform
Triangular wave modulation, sawtooth wave modulation
Holds an “H” or “L” level output
Set positive-phase level and negative-phase level separately
Carrier wave cycle
Triangular wave modulation: count source x (m + 1) x 2
Sawtooth wave modulation: count source x (m + 1)
m
: setting value of the TB2 register, 0000h to FFFFh
Count source: f1, f8, f2
n(2), fC32
Three-phase PWM output width
Triangular wave modulation: count source x k x 2
Sawtooth wave modulation: count source x k
Count source: f1, f8, f2
n(2), fC32
The INV11 bit in the INVC1 register is set to 1,
k
: setting value of registers TA4, TA41, TA1, A11, TA2, and TA21
(0001h to FFFFh)
The INV11 bit in the INVC1 register is set to 0,
k
: setting value of registers TA4, TA1, and TA2 (0001h to FFFFh)
Dead time (width)
Count source x p, or no dead time
p
: setting value of the DTT register, 01h to FFh
Count source: f1, or f1 divided by 2
Active level
Selectable from “H” or “L”
Positive-and-negative phase
concurrent active disable function
Positive-and-negative phase concurrent active disable function
Positive-and-negative phase concurrent active detect function
Interrupt frequency
Timer B2 interrupt is generated every q times
q
: setting value of the ICTB2 register, 1 to 15