
22. 16-Slot CAN Module
When using the CAN interrupt, the CiSISTR register (i = 0, 1) indicates which message slot has requested an
interrupt. The SISj bit (j = 0 to 15) is not automatically set to 0 (interrupt not requested) even if the interrupt is
acknowledged. Set the SISj bit to 0 by program.
Use the MOV instruction to set the SISj bits to 0. Write a 0 to the bit which is to set to 0, and write a 1 to the bit
which is to remain unchanged.
For example: To set the SIS0 bit in CAN0 to 0
mov.w #07FFFh, C0SISTR
22.1.11.1 Message Slot for Transmit Operation
The SISj bit becomes 1 (interrupt requested) when the value of the CiTSR register is stored into the message
slot j after a transmit operation is completed.
22.1.11.2 Message Slot for Receive Operation
The SISj bit becomes 1 (interrupt requested) when the receive message is stored in the message slot j after a
receive operation is completed.
NOTES:
1. If the RSPLOCK bit in registers CiMCTL0 to CiMCTL15 is set to 0 (automatic answering to the remote
frame enabled), the SISj bit becomes 1 when the remote frame receive operation is completed and the
following data frame transmit operation is completed.
2. In the remote frame transmit message slot, the SISj bit becomes 1 both when the remote frame transmit
operation is completed and when the data frame receive operation is completed.
3. The SISj bit becomes 1, if an interrupt request is generated and also a 0 is written by program
simultaneously.
4. Regardless of whether the SIMj bit in the CiSIMKR register is set to 0 (interrupt request masked) or to 1
(interrupt request enabled), the SISj bit becomes 1 at the completion of the transmit operation or at the
completion of the receive operation.