
25. Flash Memory
25.3.4
Data Protect Function
Each block in the flash memory has a nonvolatile lock bit. The lock bit protects (locks) each block individually
against programming and erasing. This prevents data from being inadvertently written to or erased from the
flash memory. The following is the block conditions controlled by the lock bit.
When the FMR02 bit in the FMR0 register is set to 1 (lock bit enabled);
If lock bit data is set to 0, the block is locked (block is protected against programming and erasing).
If lock bit data is set to 1, the block is unlocked (block can be programmed or erased).
When the FMR02 bit in the FMR0 register is set to 0 (lock bit disabled);
The block is unlocked (block can be programmed or erased).
When the block erase command is executed while the FMR02 bit is set to 1, the target block is erased regardless
of the lock bit state. The lock bit data of the target block becomes 1 when the block erase operation is
completed.
Lock bit data becomes 0 (locked) by executing the lock bit program command, and 1 (unlocked) by erasing a
block.
Lock bit data can be read by executing the read lock bit status command.
25.3.5
Status Register (SRD Register)
The SRD register indicates the operating status of the flash memory and whether an erase or program operation
has completed successfully or not. Bits FMR00, FMR06, and FMR07 in the FMR0 register indicate SRD
register states.
In CPU rewrite mode, the SRD register can be read in the following conditions.
A given even address in the user ROM area is read after writing the read status register command
A given even address in the user ROM area is read between when the program, block erase, or lock bit
program command is executed and when the read array command is written.
25.3.5.1
Sequencer Status (Bits SR7 and FMR00)
The sequencer status bit indicate the operating status of the flash memory. It is 0 while the program, block
erase, lock bit program, or read lock bit status command is being executed; otherwise, it is 1.
25.3.5.2
Erase Status (Bits SR5 and FMR07)
25.3.5.3
Program Status (Bits SR4 and FMR06)