
24. Programmable I/O Ports
Figure 24.5
PD0 to PD15 Registers
b7 b6 b5 b4
b1
b2
b3
Symbol
PD0 to PD3
PD4 to PD7
PD8
PD9, PD10
PD11
PD12, PD13
PD14
PD15
Address
03E2h, 03E3h, 03E6h, 03E7h
03EAh, 03EBh, 03C2h, 03C3h
03C6h(4)
03C7h(1), 03CAh
03CBh(3, 4)
03CEh, 03CFh(3)
03D2h(3, 4)
03D3h(3)
After Reset
00h
00X0 0000b
00h
XXX0 0000b
00h
X000 0000b
00h
b0
Function
Bit Symbol
Bit Name
RW
PDi_5
PDi_7
0: Input mode (functions as input port)
1: Output mode (functions as output port)
Port Pi_3 direction bit
Port Pi_7 direction bit
RW
PDi_4
RW
PDi_3
0: Input mode (functions as input port)
1: Output mode (functions as output port)
0: Input mode (functions as input port)
1: Output mode (functions as output port)
Port Pi_5 direction bit
Port Pi_6 direction bit
0: Input mode (functions as input port)
1: Output mode (functions as output port)
PDi_6
Port Pi Direction Register (i = 0 to 15)
0: Input mode (functions as input port)
1: Output mode (functions as output port)
Port Pi_4 direction bit
NOTES:
1. Set the PD9 register immediately after the PRC2 bit in the PRCR register is set to 1 (write enable). Do not generate an interrupt
or a DMA or DMACII transfer between the instruction to set the PRC2 bit to 1 and the instruction to set the PD9 register.
2. In memory expansion mode, the PDi registers cannot control pins used as the bus control pins (A0 to A22, A23, D0 to D15, CS0
to CS3, WRL/ WR, WRH/BHE, RD, BCLK/ALE/CLKOUT, ALE, ALE, RDY).
3. Set registers PD11 to PD15 to FFh in the 100-pin package.
4. Nothing is assigned to the PD8_5 bit in the PD8 register, bits PD11_7 to PD11_5 in the PD11 register, and the P14_7 bit in the
PD14 register. If necessary, set these bits to 0. When read, the content is undefined.
0: Input mode (functions as input port)
1: Output mode (functions as output port)
Port Pi_1 direction bit
PDi_1
RW
0: Input mode (functions as input port)
1: Output mode (functions as output port)
Port Pi_2 direction bit
RW
PDi_2
0: Input mode (functions as input port)
1: Output mode (functions as output port)
Port Pi_0 direction bit
PDi_0
RW